S-8225AAA-TCT1U Datasheet, PDF (8/26 Pages) Seiko Instruments Inc – BATTERY MONITORING IC

BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
Rev.1.7_02
 Test Circuits
1. Overcharge detection voltage (VCUn), overcharge release voltage (VCLn), overdischarge detection
voltage (VDLn), overdischarge release voltage (VDUn)
(Test circuit 1)
VCU1 is defined as the voltage V1 when V1 is gradually increased and the CO pin output becomes detection status
after setting V1 = V2 = V3 = V4 = V5 = VCU − 0.05 V. After that, VCL1 is defined as the voltage V1 when V1 is
gradually decreased and the CO pin output becomes release status after setting V2 = V3 = V4 = V5 = 3.2 V.
Moreover, VDL1 is defined as the voltage V1 when V1 is gradually decreased and the DO pin output becomes
detection status after setting V1 = V2 = V3 = V4 = V5 = 3.5 V. After that, VDU1 is defined as the voltage V1 when V1
is gradually increased and the DO pin output becomes release status.
Similarly, VCUn, VCLn, VDLn and VDUn can be defined by changing Vn (n = 2 to 5).
2. 0 V battery detection voltage (V0INHn) (0 V battery detection function "available")
(Test circuit 1)
V0INH1 is defined as the voltage V1 when V1 is gradually decreased and the CO pin output becomes detection
status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
Similarly, V0INHn can be defined by changing Vn (n = 2 to 5).
3. Overcharge detection delay time (tCU), overdischarge detection delay time (tDL)
(Test circuit 2)
tCU is defined as the time period from when V1 changes from 3.4 V to 4.5 V to when the CO pin output becomes
detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
Moreover, tDL is defined as the time period from when V1 changes from 3.4 V to 1.6 V to when the DO pin output
becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
4. CCT pin voltage (VCCT), CDT pin voltage (VCDT)
(Test circuit 2)
VCCT is defined as the voltage between the CCT pin and the VSS pin during the time period when V1 changes from
3.4 V to 4.5 V to when the CO pin output becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V.
Moreover, VCDT is defined as the voltage between the CDT pin and the VSS pin during the time period when V1
changes from 3.4 V to 1.6 V to when the DO pin output becomes detection status after setting V1 = V2 = V3 = V4 =
V5 = 3.4 V.
5. CTLC pin voltage "H" (VCTLCH), CTLC pin voltage "L" (VCTLCL), CTLD pin voltage "H" (VCTLDH), CTLD
pin voltage "L" (VCTLDL)
(Test circuit 3)
VCTLCL is defined as the voltage V6 when V6 is gradually decreased and the CO pin output becomes detection
status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5), V8 = V9 = 0 V. After
that, VCTLCH is defined as the voltage V6 when V6 is gradually increased and the CO pin output becomes release
status. Moreover, VCTLDL is defined as the voltage V7 when V7 is gradually decreased and the DO pin output
becomes detection status after setting V1 = V2 = V3 = V4 = V5 = 3.4 V, V6 = V7 = VDS (= V1 + V2 + V3 + V4 + V5),
V8 = V9 = 0 V. After that, VCTLDH is defined as the voltage V7 when V7 is gradually increased and the DO pin output
becomes release status.
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