S-8225AAA-TCT1U Datasheet, PDF (11/26 Pages) Seiko Instruments Inc – BATTERY MONITORING IC

Rev.1.7_02
BATTERY MONITORING IC FOR 3-SERIAL TO 5-SERIAL CELL PACK
S-8225A Series
 Operation
Remark Refer to " Connection Examples of Battery Monitoring IC".
1. Normal status
When the voltage of each of the batteries is in the range from overcharge detection voltage (VCUn) to overdischarge
detection voltage (VDLn), and the CTLC pin input voltage (VCTLC) and the CTLD pin input voltage (VCTLD) are higher
than the CTLC pin voltage "H" (VCTLCH) and the CTLD pin voltage "H" (VCTLDH), respectively, the S-8225A Series
defines each of the CO pin output voltage (VCO) and the DO pin output voltage (VDO) as "H". This is called normal
status.
VCO is defined as the CO pin voltage "H" (VCOH) when it is "H". Similarly, VDO is defined as the DO pin voltage "H"
(VDOH) when it is "H".
2. Overcharge status
When the voltage of one of the batteries becomes VCUn or higher, the CO pin output inverts and the S-8225A Series
becomes detection status. This is called overcharge status.
When the voltage of each of the batteries becomes overcharge release voltage (VCLn) or lower, the overcharge status
is released and the S-8225A Series returns to normal status.
3. Overdischarge status
When the voltage of one of the batteries becomes VDLn or lower, the DO pin output inverts and the S-8225A Series
becomes detection status. This is called overdischarge status.
When the voltage of each of the batteries becomes overdischarge release voltage (VDUn) or higher, the overdischarge
status is released and the S-8225A Series returns to normal status.
4. CTLC pin and CTLD pin
The S-8225A Series has two pins to control.
The CTLC pin controls the output voltage from the CO pin; the CTLD pin controls the output voltage from the DO pin.
Thus it is possible for users to control the output voltages from the CO pin and DO pin, respectively. These controls
precede the battery protection circuit.
Table 6 Status Set by CTLC Pin
CTLC Pin
CO Pin
"H"^*1
Normal status^*4
Open^*2
VSS
"L"^*3
VSS
*1. "H": CTLC ≥ VCTLCH
*2. Pulled down by ICTLCH
*3. "L": CTLC ≤ VCTLCL
*4. The status is controlled by the voltage detection circuit.
Table 7 Status Set by CTLD Pin
CTLD Pin
DO Pin
"H"^*1
Normal status^*4
Open^*2
VSS
"L"^*3
VSS
*1. "H": CTLD ≥ VCTLDH
*2. Pulled down by ICTLDH
*3. "L": CTLD ≤ VCTLDL
*4. The status is controlled by the voltage detection circuit.
Caution
Note that when the power supply fluctuates, unexpected behavior might occur if an electrical
potential is generated between the potentials of "H" level input to the CTLC / CTLD pins and IC's
VDD by external filters.
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