S-816 Datasheet, PDF (8/24 Pages) Seiko Instruments Inc – EXTERNAL TRANSISTOR TYPE CMOS VOLTAGE REGULATOR

EXTERNAL TRANSISTOR TYPE CMOS VOLTAGE REGULATOR
S-816 Series
Rev.5.1_00
„ Operation
1. Basic Operation
Figure 7 shows a block diagram of the S-816 Series.
The device compares the voltage which is obtained from dividing output voltage V_OUT by feedback
resistances R_A and R_B with reference voltage V_REF through the error amplifier, output of which controls the
sink driver. By regulating the base current of the external PNP transistor, the IC maintains a constant
output voltage that is not susceptible to an input voltage variation or temperature variation.
IN
OUT
VIN
EXT
VOUT
ON/OFF
Current Source
R_C
Overcurrent
Protection
R_A
Circuit
+
Error
Sink
R_B
V_REF
Amplifier
−
Driver
+
C_L
−
VSS
Figure 7
2. Internal Circuits
2.1. Shutdown Pin ( ON/OFF Pin)
This pin activates and deactivates the regulating operation.
When the shutdown pin is set to "L", the V_IN voltage appears through the EXT pin, prodding the external
PNP transistor to off. All the internal circuits stop working, and substantial savings in current consumption
are achieved accordingly. In this condition, the EXT pin is pulled up to V_IN by a pull-up resistance
(approx. 0.5 MΩ) inside the IC in order to ensure you power cut off of the external PNP transistor.
The shutdown pin is configured as shown in Figure 8. Since neither pull-up or pull-down is performed
internally, please avoid using the pin in a floating state. Also, be sure to refrain from applying a voltage of
0.3 V to 2.4 V to this pin lest the current consumption increase. When this shutdown pin is not used,
leave it coupled to the VIN pin.
Shutdown Pin
"H"
"L"
Table 5
Internal Circuit
Activated
Deactivated
EXT Pin Voltage
V_IN−V_BE
V_IN
VOUT Pin Voltage
Set value
Hi-Z
VIN
ON/ OFF
VSS
Figure 8
8
Seiko Instruments Inc.