S-816 Datasheet, PDF (10/24 Pages) Seiko Instruments Inc – EXTERNAL TRANSISTOR TYPE CMOS VOLTAGE REGULATOR

EXTERNAL TRANSISTOR TYPE CMOS VOLTAGE REGULATOR
S-816 Series
Rev.5.1_00
„ Selection of Associated External Components
1. External PNP Transistor
Select an external transistor according to the conditions of input voltage, output voltage, and output
current. A low-saturation voltage PNP transistor with "h_FE" ranging from 100 to 300 will be suitable for this
IC.
The parameters for selection of the external PNP transistor include the maximum collector-base voltage,
the maximum collector-emitter voltage, the DC amplification factor (h_FE), the maximum collector current
and the collector dissipation.
The maximum collector-base voltage and the maximum collector-emitter voltage are determined by the
input voltage range in each specific application to be employed. You may select a transistor with an input
voltage at least several volts higher than the expected maximum input voltage.
The DC amplification factor (h_FE) affects the maximum output current that can be supplied to the load.
With an internal overcurrent protection circuit of this IC, the base current is clamped, and will not exceed
the overcurrent set value (I_MAX). Select a transistor which is capable of delivering the required maximum
output current to the intended application, with hfe and maximum collector current. (Refer to
"„ Overcurrent Protection Circuit")
Likewise, select a transistor, based on the maximum output current and the difference between the input
and output voltages, with due attention to the collector dissipation.
2. Output Capacitor (C_L)
The S-816 Series performs phase compensation by an internal phase compensation circuit of IC, and the
ESR (Equivalent Series Resistance) of an output capacitor for to secure stable operation even in the
presence of output load variation. Therefore, always place a capacitor (C_L) of 4.7 µF or more between
VOUT and VSS.
For stable operation of the S-816 Series, it is essential to employ a capacitor with an ESR having
optimum range. Whether an ESR is larger or smaller than that optimum range (approximately 0.1 Ω to
5 Ω), this could produce an unstable output, and cause a possibility of oscillations. For this reason, a
tantalum electrolytic capacitor is recommended.
When a ceramic capacitor or an OS capacitor having a low ESR is selected, it will be necessary to
connect an additional resistance that serves for the ESR in series with the output capacitor, as illustrated
in Figure 9. The resistance value that needs to be added will be from 0.1 Ω to 5 Ω, but this value may
vary depends on the service conditions, and should be defined through careful evaluation in advance. In
general, our recommendation is 0.3 Ω or so.
An aluminum electrolytic capacitor tends to produce oscillations as its ESR increases at a low
temperature. Beware of this case. When this type of capacitor is employed, make thorough evaluation of
it, including its temperature characteristics.
IN
OUT
VIN
EXT
VOUT
R ≅ 0.3 Ω
C_L
S-816 Series
ON/ OFF
VSS
Figure 9
Caution The above connection diagram and constant will not guarantee successful operation.
Perform through evaluation using the actual application to set the constant.
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Seiko Instruments Inc.