S-1711 Datasheet, PDF (26/44 Pages) Seiko Instruments Inc – SUPER-SMALL PACKAGE 2-CIRCUIT HIGH RIPPLE-REJECTION

SUPER-SMALL PACKAGE 2-CIRCUIT HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1711 Series
Rev.3.1_01
 Precautions
• Wiring patterns for the VIN pin, the VOUT pin and GND should be designed so that the impedance is low. When
mounting an output capacitor between the VOUT pin and the VSS pin (CL1, CL2) and a capacitor for stabilizing the
input between the VIN pin and the VSS pin (CIN), the distance from the capacitors to these pins should be as short
as possible.
• Note that generally the output voltage may increase when a series regulator is used at low load current (1.0 mA or
less).
• Note that generally the output voltage may increase due to the leakage current from an output driver when a series
regulator is used at high temperature.
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The following
conditions are recommended for the S-1711 Series. However, be sure to perform sufficient evaluation under the
actual usage conditions for selection, including evaluation of temperature characteristics.
Input capacitor (CIN):
Output capacitor (CL1, CL2):
Equivalent series resistance (ESR):
1.0 μF or more
1.0 μF or more
1.0 Ω or less
Use input/output capacitor which has good temperature characteristics (conforming to the ceramic capacitor EIA
X5R (JIS B) characteristics).
• The voltage regulator may oscillate when the impedance of the power supply is high and the input capacitance is
small or an input capacitor is not connected.
• If the output capacitance is small, power supply’s fluctuation and the characteristics of load fluctuation become
worse. Sufficiently evaluate the output voltage’s fluctuation with the actual device.
• Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or when the power
supply fluctuates. Sufficiently evaluate the output voltage at power-on with the actual device.
• The application conditions for the input voltage, the output voltage, and the load current should not exceed the
package power dissipation.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• In determining the output current, attention should be paid to the output current value specified in Table 13 in
“ Electrical Characteristics” and footnote *5 of the table.
• SII Semiconductor Corporation claims no responsibility for any disputes arising out of or in connection with any
infringement by products including this IC of patents owned by a third party.
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