S-8233C Datasheet, PDF (18/26 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK

BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK
S-8233C Series
Rev.4.0_00
Battery Protection IC Connection Example
FET-A
Battery 1
C1
R1
DOP
VCC
Over charge
Condition
CD1
VC1
Battery 2
C2
R2
Over current
Condition
CD2
VC2
Battery 3
C3
R3
Over discharge
Condition
CD3
VSS
FET-B
R6
1 MΩ
COP
Nch open
drain
S-8233C series
EB+
R5
10 kΩ
VMP
CTL terminal voltage
GND: Normal operation
Floating or VCC: Inhibit
charging and discharging
CTL
R7
1 kΩ
Over charge delay
CCT
time setting
C4
Over discharge delay
time setting
CDT
C5
FET-C
High: Inhibit over
discharge detection
COVT
C6
Over current delay
time setting
EB-
Figure 8
[Description of Figure 8]
The over charge detection delay time (t_CU1 to t_CU3), over discharge detection delay time (t_DD1 to t_DD3), and
over current detection delay time (t_IOV1) are changed with external capacitors (C4 to C6). See the electrical
characteristics.
R6 is a pull-up resistor that turns FET-B off when the COP terminal is opened. Connect a 100 kΩ to
1 MΩ resistor.
R5 is used to protect the IC if the charger is connected in reverse. Connect a 10 kΩ to 50 kΩ resistor.
If capacitor C6 is absent, rush current occurs when a capacitive load is connected and the IC enters the
over current mode. C6 must be connected to prevent it.
If capacitor C5 is not connected, the IC may enter the over discharge condition due to variations of battery
voltage when the over current occurs. In this case, a charger must be connected to return to the normal
condition. To prevent this, connect an at least 0.01µF capacitor to C5.
If a leak current flows between the delay capacitor connection terminal (CCT, CDT, or COVT) and VSS, the
delay time increases and an error occurs. The leak current must be 100 nA or less.
Over discharge detection can be disabled by using FET-C. The FET-C off leak must be 0.1 µA or less. If
over discharge is inhibited by using this FET, the current consumption does not fall below 0.1 µA even
when the battery voltage drops and the IC enters the over discharge detection mode.
R1, R2, and R3 must be 1 kΩ or less.
R7 is the protection of the CTL when the CTL terminal voltage higher than V_CC voltage. Connect a 300 Ω to
5 kΩ resister. If the CTL terminal voltage never greater than the V_CC voltage (ex. R7 connect to V_SS),
without R7 resister is allowed.
18
Seiko Instruments Inc.