S1200 Datasheet, PDF (15/37 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR

HIGH RIPPLE-REJECTION LOW DROPOUT LOW INPUT-AND-OUTPUT CAPACITANCE CMOS VOLTAGE REGULATOR
Rev.5.1_01
S-1200 Series
3. ON/OFF pin
This pin starts and stops the regulator.
When the ON/OFF pin is set to OFF level, the entire internal circuit stops operating, and the built-in
P-channel MOS FET output transistor between the VIN pin and the VOUT pin is turned off, reducing
current consumption significantly. The VOUT pin becomes the VSS level due to the internally divided
resistance of several hundreds kΩ between the VOUT pin and the VSS pin.
The structure of the ON/OFF pin is as shown in Figure 14. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating status. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When not using the ON/OFF
pin, connect it to the VSS pin in the product A type, and connect it to the VIN pin in B type.
Table 7
Product Type
A
A
B
B
ON/OFF Pin
“L”: ON
“H”: OFF
“L”: OFF
“H”: ON
Internal Circuit
Operate
Stop
Stop
Operate
VOUT Pin Voltage
Set value
VSS level
VSS level
Set value
Current Consumption
ISS1
ISS2
ISS2
ISS1
VIN
ON/OFF
VSS
Figure 14
15