S-8204BAB-TCT1Y Datasheet, PDF (15/36 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC

Rev.3.9_00
BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK
S-8204B Series
 Operation
Remark Refer to " Connection Examples of Battery Protection IC".
1. Normal status
In the S-8204B Series, both of the COP pin and the DOP pin get the V_DD level; when the voltage of each of the
batteries is in the range of overdischarge detection voltage (V_DLn) to overcharge detection voltage (V_CUn), and due to
the discharge current, the VINI pin's voltage is discharge overcurrent detection voltage (V_DIOV1) or less. This is the
normal status. At this time, the charge FET and discharge FET are on.
2. Overcharge status
In the S-8204B Series, the voltage of one of the batteries increases to the level of more than V_CUn, the COP pin is set
in high impedance. This is the overcharge status. The COP pin is pulled down to EB− by an external resistor so that
the charge FET is turned off and it stops charging.
This overcharge status is released if either condition mentioned below is satisfied;
(1) In case that the VMP pin voltage is 39 / 40 × V_DS or more; the voltage of each of the batteries is in the level of
overcharge release voltage (V_CLn) or less.
(2) In case that the VMP pin voltage is 39 / 40 × V_DS or less; the voltage of each of the batteries is in the level of
V_CUn or less.
3. Overdischarge status
In the S-8204B Series, when the voltage of one of the batteries decreases to the level of less than V_DLn, the DOP pin
voltage gets the V_SS level. This is the overdischarge status. The discharge FET is turned off and it stops discharging.
This overcharge status is released if either condition mentioned below is satisfied;
(1) To release; the VMP pin voltage is in the level of more than V_DD, the voltage of each of the batteries is in the
V_DLn level or more.
(2) To release; the VMP pin voltage is V_DS / 2 or more and the VMP pin voltage is in the level of less than V_DD,
the voltage of each of the batteries is in the level of overdischarge release voltage (V_DUn) or more.
3. 1 Power-down function
In the S-8204B Series, power-down function "available" / "unavailable" is selectable.
3. 1. 1 With power-down function
When the S-8204B Series reaches the overdischarge status, the VMP pin is pulled down to the V_SS level by
a resistor between the VMP pin and the VSS pin (R_VMS). If the VMP pin voltage decreases to the level of
V_DS / 2 or less, the power-down function starts to operate and almost every circuit in the S-8204B Series
stops working.
The power-down function is released if the following condition is satisfied.
(1) The VMP pin voltage gets V_DS / 2 or more.
3. 1. 2 Without power-down function
The VMP pin is not pulled down even when the S-8204B Series reaches the overdischarge status. The
overdischarge status is maintained even If the VMP pin voltage decreases to the level of V_DS / 2 or less, and
the current consumption decreases to the level of current consumption during overdischarge (I_OPED) or less.
15