S814 Datasheet, PDF (14/32 Pages) Seiko Instruments Inc – LOW DROPOUT CMOS VOLTAGE REGULATOR

LOW DROPOUT CMOS VOLTAGE REGULATOR
S-814 Series
Rev.3.1_00
 Selection of Output Capacitor (C_L)
Mount an output capacitor between VOUT pin and VSS pin for phase compensation. The S-814 Series
enables customers to use a ceramic capacitor as well as a tantalum or an aluminum electrolytic capacitor.
• A ceramic capacitor or an OS capacitor:
Use a capacitor of 0.47 μF or more.
• A tantalum or an aluminum electrolytic capacitor:
Use a capacitor of 0.47 μF or more and ESR of 10 Ω or less.
Pay special attention not to cause an oscillation due to an increase in ESR at low temperatures, when
you use the aluminum electrolytic capacitor. Evaluate the capacitor taking into consideration its
performance including temperature characteristics.
Overshoot and undershoot characteristics differ depending upon the type of the output capacitor you
select. Refer to C_L dependencies of “1. Transient Response Characteristics (S-814A30A, Typical
data, Ta=25°C)” in “ Reference Data”.
 Precautions
• Wiring patterns for the VIN pin, the VOUT pin and GND should be designed so that the impedance is low.
When mounting an output capacitor between the VOUT pin and the VSS pin (C_L) and a capacitor for
stabilizing the input between the VIN pin and the VSS pin (C_IN), the distance from the capacitors to these
pins should be as short as possible.
• Note that generally the output voltage may increase when a series regulator is used at low load current
(10 μA or less).
• Generally a series regulator may cause oscillation, depending on the selection of external parts. The
following conditions are recommended for the S-814 Series. However, be sure to perform sufficient
evaluation under the actual usage conditions for selection, including evaluation of temperature
characteristics.
Output capacitor (C_L):
0.47 μF or more
Equivalent Series Resistance (ESR): 10 Ω or less
Input series resistance (R_IN):
10 Ω or less
• The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitance is small or an input capacitor is not connected.
• Overshoot may occur in the output voltage momentarily if the voltage is rapidly raised at power-on or
when the power supply fluctuates. Sufficiently evaluate the output voltage at power-on with the actual
device.
• The application conditions for the input voltage, the output voltage, and the load current should not exceed
the package power dissipation.
• In determining the output current, attention should be paid to the output current value specified in Table 5
in “ Electrical Characteristics” and footnote *3 of the table.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• SII claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
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Seiko Instruments Inc.