S8203A Datasheet, PDF (13/30 Pages) Seiko Instruments Inc – BATTERY PROTECTION IC FOR 3-SERIES CELL PACK

Rev.1.0_00
BATTERY PROTECTION IC FOR 3-SERIES CELL PACK
S-8203A Series
 Operation
Remark Refer to " Connection Examples of Battery Protection IC".
1. Normal status
In the S-8203A Series, when the voltage of each of the batteries is in the range from overdischarge detection voltage
(V_DLn) to overcharge detection voltage (V_CUn), and the VINI pin voltage is in the range from charge overcurrent
detection voltage (V_CIOV) to discharge overcurrent detection voltage (V_DIOV), both of CO pin and DO pin get the V_DD
level. This is the normal status. At this time, the charge and discharge FETs are on.
2. Overcharge status
In the S-8203A Series, when the voltage of one of the batteries increases to the level of higher than V_CUn, the CO pin
is set in high impedance. This is the overcharge status. The CO pin is pulled down to EB− by an external resistor so
that the charge FET is turned off and it stops charging.
The overcharge status is released if either condition mentioned below is satisfied;
(1) In case that the CO pin voltage is 1 / 50 × V_DS or lower, and the voltage of each of the batteries which are
V_CUn or higher is in the level of overcharge release voltage (V_CLn) or lower.
(2) In case that the CO pin voltage is 1 / 50 × V_DS or higher, and the voltage of each of the batteries is in the level
of V_CUn or lower.
3. Overdischarge status
In The S-8203A Series, when the voltage of one of the batteries decreases to the level of V_DLn or lower, the DO pin
voltage gets the V_SS level. This is the overdischarge status. The discharge FET is turned off and it stops discharging.
The overdischarge status is released if either condition mentioned below is satisfied;
(1) In case that the VM pin voltage is in the level of lower than V_SS, and the voltage of each of the batteries is in
the level of V_DLn or higher.
(2) In case that the VM pin voltage is V_DS / 5 (typ.) or lower and the VM pin voltage is in the level of higher than
V_SS, and the voltage of each of the batteries which are V_DLn or lower is in the level of overdischarge release
voltage (V_DUn) or higher.
3. 1 With power-down function
In The S-8203A Series, when it reaches the overdischarge status, the VM pin is pulled up to the V_DD level by a
resistor between VM pin and VDD pin (R_VMD). If the VM pin voltage and the CO pin voltage increase to the level of
V_DS / 5 (typ.) or higher, respectively, the power-down function starts to operate and almost every circuit in the
S-8205A/B Series stops working.
The power-down function is released if either condition mentioned below is satisfied;
(1) The VM pin voltage gets V_DS / 5 (typ.) or lower.
(2) The CO pin voltage gets V_DS / 5 (typ.) or lower.
4. Discharge overcurrent status
The discharging current increases to a certain value or higher. As a result, if the status in which the VINI pin voltage
increases to the level of V_DIOV or higher, the DO pin gets the V_SS level. This is the discharge overcurrent status. The
discharge control FET is turned off and it stops discharging. In the status of discharge overcurrent, the CO pin is set
in high impedance. The VM pin is pulled down to the V_SS level by a resistor between VM pin and VSS pin (R_VMS).
The S-8203A Series has two levels for discharge overcurrent detection (V_DIOV, V_SHORT).
The S-8203A Series' actions against load short-circuiting detection voltage (V_SHORT) are as well in V_DIOV.
The discharge overcurrent status is released if the following condition is satisfied.
(1) The VM pin voltage gets V_DS / 10 (typ.) or lower.
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