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S-1112_1 Datasheet, PDF (13/30 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
Rev.5.1_00
S-1112/1122 Series
7.
Temperature coefficient of
output
voltage


∆V OUT
∆Ta • VOUT


The shadowed area in Figure 11 is the range where VOUT varies in the operating temperature range
when the temperature coefficient of the output voltage is ±100 ppm/°C.
Ex. S-1112/1122B28 Typ.
VOUT
[V]
+0.28 mV / °C
VOUT(E)*1
−0.28 mV / °C
−40
25
85
Ta [°C]
*1. VOUT(E) is the value of the output voltage measured at 25°C.
Figure 11
A change in the temperature of the output voltage [mV/°C] is calculated using the following equation.
∆VOUT [mV / °C]*1 = [ VOUT(S) V]*2 × ∆VOUT [ppm / °C]*3 ÷1000
∆Ta
∆Ta • VOUT
*1. Change in temperature of output voltage
*2. Specified output voltage
*3. Output voltage temperature coefficient
Seiko Instruments Inc.
13