S1112 Datasheet, PDF (12/30 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION AND LOW DROPOUT

HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1112/1122 Series
Rev.6.1_00
 Explanation of Terms
1. Low dropout voltage regulator
This voltage regulator has the low dropout voltage due to its built-in low on-resistance transistor.
2. Low ESR
A capacitor whose ESR (Equivalent Series Resistance) is low. The S-1112/1122 Series enables use of a
low ESR capacitor, such as a ceramic capacitor, for the output-side capacitor (C_L). A capacitor whose
ESR is 10 Ω or less can be used.
3. Output voltage (V_OUT)
The accuracy of the output voltage is ensured at ±1.0% under the specified conditions of fixed input
voltage^*1, fixed output current, and fixed temperature.
*1. Differs depending the product.
Caution If the above conditions change, the output voltage value may vary and exceed the
accuracy range of the output voltage. Refer to “ Electrical Characteristics” and “
Characteristics (Typical Data)” for details.
4. Line regulation
 ^ΔVOUT1 
ΔV_IN • V_OUT 
Indicates the dependency of the output voltage on the input voltage. That is, the values show how
much the output voltage changes due to a change in the input voltage with the output current remaining
unchanged.
5. Load regulation (ΔV_OUT2)
Indicates the dependency of the output voltage on the output current. That is, the values show how
much the output voltage changes due to a change in the output current with the input voltage remaining
unchanged.
6. Dropout voltage (V_drop)
Indicates the difference between input voltage (V_IN1) and the output voltage when; decreasing input
voltage (V_IN) gradually until the output voltage has dropped out to the value of 98% of output voltage
(V_OUT3), which is at V_IN = V_OUT(S) + 1.0 V.
V_drop = V_IN1 − (V_OUT3 × 0.98)
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Seiko Instruments Inc.