S-1142D33A-E6T2U Datasheet, PDF (12/31 Pages) Seiko Instruments Inc – Built-in thermal shutdown circuit

HIGH-WITHSTAND VOLTAGE LOW CURRENT CONSUMPTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1142C/DxxA Series
Rev.1.1_01
 Operation
1. Basic operation
Figure 10 shows the block diagram of the S-1142C/DxxA Series.
The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output voltage
resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to maintain the constant
output voltage which is not influenced by the input voltage and temperature change, to the output transistor.
VIN
Current
supply
V_ref
Error amplifier
−
+
Reference voltage
circuit
*1
R_f
V_fb
R_s
VOUT
VSS
*1. Parasitic diode
Figure 10
2. Output transistor
In the S-1142C/DxxA Series, a low on-resistance P-channel MOS FET is used as the output transistor.
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to reverse
current flowing from the VOUT pin through a parasitic diode to the VIN pin, when the potential of VOUT became
higher than VIN.
12