S-1142D33A-E6T2U Datasheet, PDF (10/31 Pages) Seiko Instruments Inc – Built-in thermal shutdown circuit

HIGH-WITHSTAND VOLTAGE LOW CURRENT CONSUMPTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-1142C/DxxA Series
Rev.1.1_01
 Standard Circuit
Input
C_IN^*1
VIN
VOUT
ON / OFF
VSS
Output
C_L^*2
Single GND
GND
*1. CIN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 0.1 μF or more can be used as CL.
Figure 9
Caution The above connection diagram and constants will not guarantee successful operation. Perform
thorough evaluation using an actual application to set the constants.
 Condition of Application
Input capacitor (CIN): 0.1 μF or more
Output capacitor (CL): 0.1 μF or more
Caution Generally a series regulator may cause oscillation, depending on the selection of external parts.
Confirm that no oscillation occurs in the application for which the above capacitors are used.
 Selection of Input and Output Capacitors (CIN, CL)
The S-1142C/DxxA Series requires an output capacitor between the VOUT pin and the VSS pin for phase compensation.
Operation is stabilized by a ceramic capacitor with an output capacitance of 0.1 μF or more over the entire temperature
range. When using an OS capacitor, a tantalum capacitor, or an aluminum electrolytic capacitor, the capacitance must
be 0.1 μF or more.
The values of output overshoot and undershoot, which are transient response characteristics, vary depending on the
value of the output capacitor.
The required value of capacitance for the input capacitor differs depending on the application.
Set the value for input capacitor (CIN) and output capacitor (CL) as follows.
CIN ≥ 0.1 μF
CL ≥ 0.1 μF
Caution Define the capacity values of CIN and CL by sufficient evaluation including the temperature
characteristics under the actual usage conditions.
10