S-93C76A Datasheet, PDF (11/33 Pages) Seiko Instruments Inc – CMOS SERIAL E2PROM

Rev.3.2_00
CMOS SERIAL E²PROM
S-93C76A
2. 2 Erasing data (ERASE)
This instruction is used to erase specified 16-bit data. All the 16 bits of the data are “1”. After
making CS “H”, input a start bit, the ERASE instruction, and an address. It is not necessary to input
data. The data erase operation is started when CS is made “L”.
tCDS
CS
Verify
Stand by
SK
1 2 3 4 5 6 7 8 9 10 11 12 13
DI
<1> 1 1 X A8 A7 A6 A5 A4 A3 A2 A1 A0
DO
Hi-Z
tSV
tHZ1
Busy Ready _Hi-Z
tPR
Figure 8 Data Erase Timing
2. 3 Writing to chip (WRAL)
This instruction is used to write the same 16-bit data to the entire address space of the memory.
After making CS “H”, input a start bit, the WRAL instruction, an address, and 16-bit data. Any
address may be input. If data of more than 16 bits is input, the written data is sequentially shifted at
each clock, and the 16-bit data input last is the valid data. The write operation is started when CS
is made “L”. It is not necessary to set the data to “1” before it is written.
tCDS
CS
Verify
Stand by
SK
1 2 3 4 5 6 7 8 9 10 11 12 13 14
29
DI
<1> 0 0 0 1
8Xs
DO
Hi-Z
D15
D0
tSV
tHZ1
Busy Ready _Hi-Z
tPR
Figure 9 Chip Write Timing
2. 4 Erasing chip (ERAL)
This instruction is used to erase the data of the entire address space of the memory.
All the data is “1”. After making CS “H”, input a start bit, the ERAL instruction, and an address. Any
address may be input. It is not necessary to input data. The chip erase operation is started when
CS is made “L”.
tCDS
CS
Verify
Stand by
SK
1 2 3 4 5 6 7 8 9 10 11 12 13
DI
<1> 0 0 1 0
8Xs
DO
Hi-Z
tSV
tHZ1
Busy Ready _Hi-Z
tPR
Figure 10 Chip Erase Timing
Seiko Instruments Inc.
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