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S-93C76A-H Datasheet, PDF (11/28 Pages) Seiko Instruments Inc – FOR AUTOMOTIVE OPERATION 3-WIRE SERIAL E2PROM | |||
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Rev.3.1_01
FOR AUTOMOTIVE 105°C OPERATION 3-WIRE SERIAL E2PROM
S-93C76A H Series
2. Writing (WRITE, ERASE, WRAL, ERAL)
Write instructions (WRITE, ERASE, WRAL, and ERAL) are used to start writing data to the non-volatile memory by
making CS âLâ after the specified number of clocks has been input.
The write operation is completed within the write time tPR (10 ms) no matter which write instruction is used. The
typical write time is less than half 10 ms. If the end of the write operation is known, therefore, the write cycle can
be minimized. To ascertain the end of a write operation, make CS âLâ to start the write operation and then make
CS âHâ again to check the status of the DO output pin. This series of operations is called a verify operation.
If DO outputs âLâ during the verify operation period in which CS is âHâ, it indicates that a write operation is in
progress. If DO outputs âHâ, it indicates that the write operation is finished. The verify operation can be executed
as many times as required. This operation can be executed in two ways. One is detecting the positive transition
of DO output from âLâ to âHâ while holding CS at âHâ. The other is detecting the positive transition of DO output
from âLâ to âHâ by making CS âHâ once and checking DO output, and then returning CS to âLâ.
During the write period, SK and DI are invalid. Do not input any instructions during this period. Input an
instruction while the DO pin is outputting âHâ or is in a high-impedance state. Even while the DO pin is outputing
âHâ, DO immediately goes into a high-impedance (High-Z) state if âHâ of DI (start bit) is input at the rising edge of
SK.
Keep DI âLâ during the verify operation period.
2. 1 Writing data (WRITE)
This instruction is used to write 16-bit data to a specified address.
After making CS âHâ, input a start bit, the WRITE instruction, an address, and 16-bit data. If data of more than
16 bits is input, the written data is sequentially shifted at each clock, and the 16 bits input last are the valid
data. The write operation is started when CS is made âLâ. It is not necessary to set data to â1â before it is
written.
tCDS
CS
Verify
Standby
SK
1 2 3 4 5 6 7 8 9 10 11 12 13 14
29
DI
<1> 0 1 X A8 A7 A6 A5 A4 A3 A2 A1 A0 D15
D0
DO
High-Z
tSV
tHZ1
busy ready
tPR
High-Z
Figure 7 Data Write Timing
2. 2 Erasing data (ERASE)
This instruction is used to erase specified 16-bit data. All the 16 bits of the data are â1â. After making CS
âHâ, input a start bit, the ERASE instruction, and an address. It is not necessary to input data. The data
erase operation is started when CS is made âLâ.
tCDS
CS
Verify
Standby
SK
1 2 3 4 5 6 7 8 9 10 11 12 13
DI
<1> 1 1 X A8 A7 A6 A5 A4 A3 A2 A1 A0
DO
High-Z
tSV
tHZ1
busy ready
tPR
High-Z
Figure 8 Data Erase Timing
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