HYM64V8005GU-50 Datasheet, PDF (9/17 Pages) Siemens Semiconductor Group – 3.3V 8M x 64-Bit EDO-DRAM Module 3.3V 8M x 72-Bit EDO-DRAM Module

HYM 64(72)V8005/45GU-50/-60
8M x 64/72 DRAM Module
DC Characteristics for HYM64/72V8005
T_A = 0 to 70 °C; V_CC = 3.3 V ± 0.3 V
Parameter
Symbol
x 64
min. max.
Average V_CC supply current:
I_CC1
-50 version
-60 version
– 1120
–
960
x 72
min. max.
– 1260
– 1080
Unit Note
s
mA ^{2) 3)}
mA ⁴⁾
(RAS, CAS, address cycling, t_RC = t_RC min.)
Standby V_CC supply current
I_CC2
(RAS = CAS = V_IH, one address change)
Average V_CC supply current during RAS I_CC3
only refresh cycles:
-50 version
-60 version
–
8
–
9 mA –
2) 4)
– 1120 – 1260 mA
–
960
– 1080 mA
(RAS cycling, CAS = V_IH , t_RC = t_RC min.)
Average V_CC supply current during
I_CC4
hyper page mode (EDO):
-50 version
-60 version
–
840
–
945 mA ^{2) 3)}
–
640
–
720 mA ⁴⁾
(RAS = V_IL, CAS, address cycling
t_PC = t_PC min.)
Standby V_CC supply current
I_CC5
(RAS = CAS = V_CC – 0.2 V, one address
change)
Average V_CC supply current during
I_CC6
CAS-before-RAS refresh mode:
-50 version
-60 version
–
4
–
4,5 mA –
–
1120
–
1280 mA ^{2) 4)}
–
920
– 1035 mA
(RAS, CAS cycling, t_RC = t_RC min.)
Semiconductor Group
9