HYM328025S Datasheet, PDF (9/11 Pages) Siemens Semiconductor Group – 8M x 32-Bit EDO-DRAM Module

HYM328025S/GS-50/-60
8M × 32-Bit EDO-Module
Notes:
1) All voltages are referenced to V_SS.
Vil may undershoot to -2.0 V for pulse width of less than or equal to 4 ns. Pulse width is measured at 50%
points with amplitude measured peak to the DC reference.
2) I_CC1, I_CC3, I_CC4 and I_CC6 depend on cycle rate.
3) I_CC1 and I_CC4 depend on output loading. Specified values are obtained with the output open.
4) Address can be changed once or less while RAS = Vil. In case of ICC4 it can be changed once or less during
a hyper page mode (EDO) cycle.
5) An initial pause of 200 µs is required after power-up followed by 8 RAS cycles of which at least one cycle has
to be a refresh cycle, before proper device operation is achieved. In case of using the internal refresh counter,
a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required.
6) AC measurements assume t_T = 2 ns.
7) V_{IH (min.)} and V_{IL (max.)} are reference levels for measuring timing of input signals. Transition times are also
measured between V_IH and V_IL.
8) Measured with the specified current load and 100 pF at Vol = 0.8 V and Voh = 2.0 V. Access time is determined
by the latter of t_RAC, t_CAC, t_AA,t_CPA . t_CAC is measured from tristate.
.
9) Operation within the t_{RCD (max.)} limit ensures that t_{RAC (max.)} can be met. t_{RCD (max.)} is specified as a reference point
only. If t_RCD is greater than the specified t_{RCD (max.)} limit, then access time is controlled by t_CAC.
10) Operation within the t_{RAD (max.)} limit ensures that t_{RAC (max.)} can be met. t_{RAD (max.)} is specified as a reference point
only. If t_RAD is greater than the specified t_{RAD (max.)} limit, then access time is controlled by t_AA.
11) Either t_RCH or t_RRH must be satisfied for a read cycle.
12) t_{OFF (max.)} define the time at which the output achieves the open-circuit conditions and are not referenced to
output voltage levels. t_OFF is referenced from the rising edge of RAS or CAS, whichever occurs last.
13) t_WCS is not a restrictive operating parameter. This is included in the data sheet as electrical characteristics only.
If t_WCS > t_{WCS (min.)}, the cycle is an early write cycle and data out pin will remain open-circuit (high impedance)
through the entire cycle.
14) These parameters are referenced to the CAS leading edge.
Semiconductor Group
9