PSB7238 Datasheet, PDF (72/190 Pages) Siemens Semiconductor Group – Joint Audio Decoder-Encoder - Multimode

PSB 7238
Functional Blocks
Figure 31
Note: For simplification of the diagram the states of MX and MR are shown as ‘0’ or ‘1’
during the entire 125-µs frame without regard to the bit positions they actually
occupy.
Software Handling of Monitor Channel Transmission
The idle state of the transmitter is maintained when the MXC (Monitor channel Transmit
Control) bit is 0. In order to transmit the first byte, its value is written into the MONX
(Monitor channel Transmit) register. After the MXC bit is set to 1, the monitor channel
hardware sends the byte from MONX and controls the MX bit accordingly (MX:1 → 0).
When the hardware detects the acknowledgment from the other end (received MR
bit = 0), it will set the MDA (Monitor Data Acknowledged) bit. When this is detected by
the software, it writes the next byte in MONX register. This byte is sent and the MX bit
controlled accordingly. The acknowledgment by the other end is again indicated by the
MDA status bit. This procedure is repeated until all the data is transmitted. After the last
MDA status the software sets the MXC bit back to 0 and the transmit channel including
the MX bit returns to the idle state.
If an abort request from the receiving end is detected by the hardware, the MAB (Monitor
channel Abort) status bit is set.
In the PSB 7238 the Monitor channel transmitter implements the so-called maximum
speed option of this protocol, whereby the acknowledgment of every byte (except the
first) by the receiving end is anticipated. This means that an MDA interrupt status is
generated as soon as the received MR bit is detected to go from 0 to 1. Transmission of
the next byte is started as soon as the software has reacted to this interrupt. Thus a
maximum transfer speed of 32 Kbit/s can be obtained.
Semiconductor Group
72
Data Sheet 1998-07-01