HYM364020S Datasheet, PDF (7/10 Pages) Siemens Semiconductor Group – 4M x 36-Bit Dynamic RAM Module

HYM 364020S/GS-60
4M × 36-Bit
AC Characteristics ⁵⁾⁶⁾
T_A = 0 to 70 °C,V_CC = 5 V ± 10 %, t_T = 5 ns
Parameter
Symbol
Limit Values
Unit Note
common parameters
Random read or write cycle time
RAS precharge time
RAS pulse width
CAS pulse width
Row address setup time
Row address hold time
Column address setup time
Column address hold time
RAS to CAS delay time
RAS to column address delay time
RAS hold time
CAS hold time
CAS to RAS precharge time
Transition time (rise and fall)
Refresh period
-60
min.
max.
t_RC
110
–
ns
t_RP
40
–
ns
t_RAS
60
10k
ns
t_CAS
15
10k
ns
t_ASR
0
–
ns
t_RAH
10
–
ns
t_ASC
0
–
ns
t_CAH
15
–
ns
t_RCD
20
45
t_RAD
15
30
ns
t_RSH
15
–
ns
t_CSH
60
–
ns
t_CRP
5
–
ns
t_T
3
50
ns 7
t_REF
–
32
ms
Read Cycle
Access time from RAS
t_RAC
–
60
ns 8, 9
Access time from CAS
t_CAC
–
15
ns 8, 9
Access time from column address
t_AA
–
30
ns 8,10
Column address to RAS lead time
t_RAL
30
–
ns
Read command setup time
t_RCS
0
–
ns
Read command hold time
t_RCH
0
–
ns 11
Read command hold time referenced to
t_RRH
0
–
ns 11
RAS
CAS to output in low-Z
Output buffer turn-off delay
t_CLZ
0
t_OFF
0
–
ns 8
15
ns 12
Semiconductor Group
7