HYB3117800BSJ-50 Datasheet, PDF (6/26 Pages) Siemens Semiconductor Group – 2M x 8-Bit Dynamic RAM

HYB 3117800BSJ-50/-60/-70
2M x 8-DRAM
DC Characteristics (cont’d)
T_A = 0 to 70 °C, V_SS = 0 V, V_CC = 3.3 V ± 0.3V, t_T = 5 ns
Parameter
Symbol
Limit Values
min.
max.
Average V_CC supply current,
I_CC4
during fast page mode: -50 ns version
–
40
-60 ns version
–
35
-70 ns version
(RAS = V_IL, CAS, address cycling,t_PC = t_PC min.)
–
30
Standby V_CC supply current
(RAS = CAS = V_CC – 0.2 V)
I_CC5
–
1
Average V_CC supply current, during CAS-
I_CC6
before-RAS refresh mode: -50 ns version
–
120
-60 ns version
-70 ns version
–
110
–
100
(RAS, CAS cycling, t_RC = t_RC min.)
Average Self Refresh Current
I_CC7
_
1
(CBR cycle with tRAS>TRASSmin., CAS held low,
WE=Vcc-0.2V, Address and Din=Vcc-0.2V or 0.2V)
Unit Test
Condition
mA ^{2) 3) 4)}
mA ^{2) 3) 4)}
mA ^{2) 3) 4)}
mA ¹⁾
mA ^{2) 4)}
mA ^{2) 4)}
mA ^{2) 4)}
mA
Capacitance
T_A = 0 to 70 °C,V_CC = 3.3 V ± 0.3V, f = 1 MHz
Parameter
Input capacitance (A0 to A10)
Input capacitance (RAS, CAS, WE, OE)
I/O capacitance (I/O1-I/O8)
Symbol
C_I1
C_I2
C_IO
Limit Values
min.
max.
–
5
–
7
–
7
Unit
pF
pF
pF
Semiconductor Group
6