SLX24C0816P Datasheet, PDF (17/27 Pages) Siemens Semiconductor Group – 8/16 Kbit 1024/2048 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus, Page Protection Mode

SLx 24C08/16/P
6.3 Sequential Read
A sequential read is initiated in the same way as a current read or a random read except
that the master acknowledges the data byte transmitted by the EEPROM. The EEPROM
then continues the data transmission. The internal address counter is incremented by
one during each data byte transmission.
A sequential read allows the entire memory to be read during one read operation. After
the highest addressable memory location is reached, the internal address pointer “rolls
over” to the address 0 and the sequential read continues.
The transmission is terminated by the master by releasing the SDA line (no
acknowledge) and generating a STOP condition (see figure 13).
S
T
S
Bus Activity ^A Command Byte
A
A
T
Master
R
CSW
C
C
O
T
K
K
P
SDA Line S
1
P
Bus Activity
EEPROM
A _{Data Byte n}
C
K
Data Byte n+1 Data Byte n+x
IED02134
Figure 13
Sequential Read
Semiconductor Group
17
1998-07-27