PEB2035 Datasheet, PDF (126/134 Pages) Siemens Semiconductor Group – ICs for Communications (Advanced CMOS Frame Aligner)

PEB 2035
SCLK
4-MHz
AFR
AFT
RDO
2-Mbit/s
XDI
2-Mbit/s
t _AFD
t _AFD
t _ROD
t _ROD
FS/DL
FS/DL Time-Slot
FS/DL
1
2
1
2
Channel 1
3
3
ITD03589
Figure 22b
Timing for Signals AFT/AFR (DL Clock) in Case of 2-Mbit/s System Interface Mode
SCLK
4-MHz
AFR
AFT
RDO
4-Mbit/s
XDI
4-Mbit/s
RDCF XMF
RMF
t _AFD
t _AFD
FS/DL Time-Slot
t _ROD
t _ROD
FS/DL RDCF
FS/DL
ITD03590
Figure 22c
Timing for Signals AFT/AFR (DL Clock) in Case of 4-Mbit/s System Interface Mode
Semiconductor Group
126