SAB82525H-V21 Datasheet, PDF (124/126 Pages) Siemens Semiconductor Group – High-Level Serial Communication Controller Extended

SAB 82525
SAB 82526
SAF 82525
SAF 82526
The adaption of the AxCLKA/B pulses is solved by means of shifting the receive data and
transmit data in the ACFA device appropriately. In this case the AxCLKA and AxCLKB
synchronization pulses are also identical. The ACFA device contains special registers to
control the bit shift of the serial bit streams at the system interface (see ACFA Data Sheet).
With the following register programming the bit shift selected is T = – 510 for the HSCX
transmit data and T = 1 for the receive data respectively. The programming is as follows:
XDI:
XC1.XTO = 3D_H
XC0.XCO = 07_H
=> X = 494
=> T = – 510
RDO:
RC1.RTO = 00_H
RC0. RCO = 03_H
=> X = 3
=> T = 1
The timing in principle is depicted in the following diagram. Without all details of a typical
electrical timing it illustrates how the different signals from HSCX, ACFA and PRACT are
mapped in such a Primary Access system.
CLK4M
FSC
AxCLKA/B =FSC
RxCLKA/B=
TxCLKA/B = CLK2M
TxDA/B
= XDI (T = -510)
RxDA/B
= RDO (T = 1)
=: Channel 0,Bit 0 (Least Significant Bit)
ACFA Programming for Appropriate Delays (see ACFA Data Sheet):
XDI : T = - 510 = > X = 495 = > XC1.XTO = 3DH, XC0.XCO = 7H
RDO : T = 1 = > X = 3 = > RC1.RTO = 0, RC0.RCO = 3 _H
ITD05881
HSCX Signal Mapping for Primary Rate Interface T1/E1 Siemens System Interface
(ACFA/PRACT)
Semiconductor Group
124