SDA2526-5 Datasheet, PDF (10/12 Pages) Siemens Semiconductor Group – Nonvolatile Memory 2-Kbit E2PROM with I2C Bus

SDA 2526-5
Figure 2
Timing Conditions for the I²C Bus (high-speed mode)
Parameter
Symbol
Limit Values
Unit
min.
max.
Minimum time the bus must be free
before a new transmission can start
Start condition hold time
Clock low period
Clock high period
Start condition set-up time,
only valid for repeated start code
Data set-up time
Rise time of both the SDA- and SCL-line
Fall time of both the SDA- and SCL-line
Stop condition set-up time
Hold time data
t_BUF
4.7
µs
t_HD;STA 4.0
µs
t_LOW
4.7
µs
t_HIGH
4.0
µs
t_SU;STA 4.7
µs
t_SU;DAT 250
ns
t_R
1
µs
t_F
300
ns
t_SU;STO 4.7
µs
t_HD;DAT 0*)
* Note that a transmitter must internally provide at least a hold time to bridge the undefined region (max. 300 ns)
of the falling edge of SCL.
Semiconductor Group
26