TS3USB3000_15 Datasheet, PDF (18/26 Pages) Texas Instruments – DPDT USB 2.0 High-Speed and Mobile High-Definition Link Switch

TS3USB3000
SCDS337B – DECEMBER 2012 – REVISED DECEMBER 2015
www.ti.com
Layout Guidelines (continued)
Due to high frequencies associated with the USB, a printed circuit board with at least four layers is
recommended; two signal layers separated by a ground and power layer as shown in Figure 34.
Signal 1
GND Plane
Power Plane
Signal 2
Figure 34. Four-Layer Board Stack-Up
The majority of signal traces must run on a single layer, preferably Signal 1. Immediately next to this layer should
be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or power
plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing the
number of signal vias reduces EMI by reducing inductance at high frequencies.
11.2 Layout Example
LEGEND
VIA to Power Plane
VIA to GND Plane
Polygonal Copper Pour
V+
Bypass Capacitor
To Microcontroller
USB port
MHL port
10
1 USB+ VCC
SEL 9
2 USB–
D+ 8
3 MHL+
D– 7
4 MHL–
GND
5
OE 6
To USB connector
To Microcontroller
Figure 35. Package Layout Diagram
18
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