LH28F800BJE-PBTL70 Datasheet, PDF (9/47 Pages) Sharp Electrionic Components – 8M (x8/x16) Flash Memory

LHF80J47
7
2 PRINCIPLES OF OPERATION
The product includes an on-chip WSM to manage block
erase, full chip erase, word/byte write and lock-bit
configuration functions. It allows for: fixed power supplies
during block erase, full chip erase, word/byte write and
lock-bit configuration, and minimal processor overhead
with RAM-like interface timings.
After initial device power-up or return from reset mode
(see section 3 Bus Operations), the device defaults to read
array mode. Manipulation of external memory control pins
allow array read, standby and output disable operations.
Status register and identifier codes can be accessed
through the CUI independent of the V_CCW voltage. High
voltage on V_CCW enables successful block erase, full chip
erase, word/byte write and lock-bit configurations. All
functions associated with altering memory contents−block
erase, full chip erase, word/byte write, lock-bit
configuration, status and identifier codes−are accessed via
the CUI and verified through the status register.
Commands are written using standard microprocessor
write timings. The CUI contents serve as input to the
WSM, which controls the block erase, full chip erase,
word/byte write and lock-bit configuration. The internal
algorithms are regulated by the WSM, including pulse
repetition, internal verification and margining of data.
Addresses and data are internally latched during write
cycles. Writing the appropriate command outputs array
data, accesses the identifier codes or outputs status register
data.
Interface software that initiates and polls progress of block
erase, full chip erase, word/byte write and lock-bit
configuration can be stored in any block. This code is
copied to and executed from system RAM during flash
memory updates. After successful completion, reads are
again possible via the Read Array command. Block erase
suspend allows system software to suspend a block erase
to read/write data from/to blocks other than that which is
suspend. Word/byte write suspend allows system software
to suspend a word/byte write to read data from any other
flash memory array location.
[A₁₈-A₀]
7FFFF
78000
77FFF
70000
6FFFF
68000
67FFF
60000
5FFFF
58000
57FFF
50000
4FFFF
48000
47FFF
40000
3FFFF
38000
37FFF
30000
2FFFF
28000
27FFF
20000
1FFFF
18000
17FFF
10000
0FFFF
08000
07FFF
07000
06FFF
06000
05FFF
05000
04FFF
04000
03FFF
03000
02FFF
02000
01FFF
01000
00FFF
00000
Bottom Boot
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
32KW/64KB Main Block
4KW/8KB Parameter Block
4KW/8KB Parameter Block
4KW/8KB Parameter Block
4KW/8KB Parameter Block
4KW/8KB Parameter Block
4KW/8KB Parameter Block
4KW/8KB Boot Block
4KW/8KB Boot Block
[A₁₈-A_-1]
14
0FFFFF
0F0000
13 ^0EFFFF
0E0000
12
0DFFFF
0D0000
11 ^0CFFFF
0C0000
10
0BFFFF
0B0000
9 ^0AFFFF
0A0000
8
09FFFF
090000
7
08FFFF
080000
6 ^07FFFF
070000
5
06FFFF
060000
4
05FFFF
050000
3
04FFFF
040000
2
03FFFF
030000
1
02FFFF
020000
0
01FFFF
010000
5
00FFFF
00E000
4
00DFFF
00C000
3
00BFFF
00A000
2
009FFF
008000
1
007FFF
006000
0
005FFF
004000
1
003FFF
002000
0
001FFF
000000
Figure 3. Memory Map
Rev. 1.27