LRS1805A Datasheet, PDF (13/57 Pages) Sharp Electrionic Components – Stacked Chip 64M (x16) Flash Memory + 16M (x16) Smartcombo RAM

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LRS1805A
11
5.3 Functions of Block Lock and Block Lock-Down
State
F-WP
Current State
DQ₁₍₁₎
DQ₀₍₁₎
State Name
Erase/Program Allowed ⁽²⁾
[000]
0
0
0
Unlocked
Yes
[001]⁽³⁾
0
0
1
Locked
No
[011]
0
1
1
Locked-down
No
[100]
1
0
0
Unlocked
Yes
[101]⁽³⁾
1
0
1
Locked
No
[110]⁽⁴⁾
1
1
0
Lock-down Disable
Yes
[111]
1
1
1
Lock-down Disable
No
Notes:
1. DQ₀ = 1: a block is locked; DQ₀ = 0: a block is unlocked.
DQ₁ = 1: a block is locked-down; DQ₁ = 0: a block is not locked-down.
2. Erase and program are general terms, respectively, to express: block erase, full chip erase and (page buffer) program
operations.
3. At power-up or device reset, all blocks default to locked state and are not locked-down, that is, [001] (F-WP = 0) or [101]
(F-WP = 1), regardless of the states before power-off or reset operation.
4. When F-WP is driven to V_IL in [110] state, the state changes to [011] and the blocks are automatically locked.
5.4 Block Locking State Transitions upon Command Write⁽⁴⁾
Current State
Result after Lock Command Written (Next State)
State F-WP DQ₁
DQ₀
Set Lock⁽¹⁾
Clear Lock⁽¹⁾
Set Lock-down⁽¹⁾
[000]
0
0
0
[001]
No Change
[011]⁽²⁾
[001]
0
0
1
No Change⁽³⁾
[000]
[011]
[011]
0
1
1
No Change
No Change
No Change
[100]
1
0
0
[101]
No Change
[111]⁽²⁾
[101]
1
0
1
No Change
[100]
[111]
[110]
1
1
0
[111]
No Change
[111]⁽²⁾
[111]
1
1
1
No Change
[110]
No Change
Notes:
1. “Set Lock” means Set Block Lock Bit command, “Clear Lock” means Clear Block Lock Bit command and “Set Lock-
down” means Set Block Lock-Down Bit command.
2. When the Set Block Lock-Down Bit command is written to the unlocked block (DQ₀ = 0), the corresponding block is
locked-down and automatically locked at the same time.
3. “No Change” means that the state remains unchanged after the command written.
4. In this state transitions table, assumes that F-WP is not changed and fixed V_IL or V_IH.