LU6000F0 Datasheet, PDF (1/3 Pages) Sharp Electrionic Components – 16-Bit Single-Chip Microcomputers (With Built-In Flash Memory)

LU6000F0/LU6000F1
LU6000F0/LU6000F1 16-Bit Single-Chip Microcomputers
(With Built-In Flash Memory)
DESCRIPTION
The LU6000F0/F1 are single-chip 16-bit micro-
the resultant data can also successively be
computers, flash memory versions of SM6000
stored.
series. LU6000F0 is packaged in 100-pin QFP and
• System clock cycle :
LU6000F1 in 100-p,in LQFP (0.5 mm pin-pitch).
The LU6000F0/F1s internal flash memory is user
programmable : it can be programmed using a
PROM writer, through the serial interface (UART)
Y (on-board writing), or by copying data stored in a
PROM by using the copy board designed for this
purpose.
R _{LU6000F0/F1 are compatible with SM6000 series}
which contains ROM instead of flash memory.
LU6000F0/F1 can be programmed to operate as
A _{ROM version. Once the program has been}
imported into the ROM, the user can run the
program without having to verify it.
I ^N _FEATURES
• Flash memory capacity : 126 976 x 8 bits
• RAM capacity : 3 584 x 8 bits
M • External memory expansion function :
On chip bus controller for external memory
I _{• Bus multiplexing/nonmultiplexing selection}
• Bus width selection
L _{• Auto wait control}
• CPU :
• General purpose registers : 16-bit x 16
E • 62 basic instructions (bit manipulation
instructions suitable for controlling, bit transfer
instructions, bit branch instructions, high speed
R _{multiplication and division instructions (16 bits}
x 16 bits, 16 bits ÷ 16 bits, 32 bits ÷ 16 bits))
P • 10 addressing modes
0.133 µs (MIN.) (VDD = 4.5 to 5.5 V, at 30 MHz
main clock cycle)
0.2 µs (MIN.)(VDD = 2.7 to 3.6 V, at 20 MHz
main clock, single chip mode)
Selectable system clocks divided by 2 up to 16
main clocks for low power operation.
• Built-in main clock oscillator for system clock
• Interrupts : Total 27, software interrupts
• 24 maskable interrupts (external 4, internal 20)
• 3 nonmaskable interrupts
A nonmaskable interrupt, when used in
conjunction with BST instruction, can trigger
the software reset.
• Standby function : Halt mode/Stop mode
• I/O ports x 88/specific purpose function pin x 3 :
• Input ports x 8 (also serve as A/D input)
• I/O ports x 80 (also serve as function pins)
• Specific purpose function pin x 3 (D/A output
pin x 2, bus mode selection pin x 1)
• Timer : 16-bit multifunction timers x 6
• 5-stage capture + 2-stage compare type x 1
• 1-stage compare type x 2
• 2-stage capture type (or capture + compare) x 2
• 2-stage compare, PWM output type x 1
• Watchdog timer (overrun detect timer) : 8 bits x 1
• Serial interfaces :
• Selectable universal asynchronous receiver
transmitter (UART) / serial I/O interface (SIO) x 2
• Serial I/O interface (SIO) x 1
• A/D converter :
• 16 M bytes of address space
Resolution 10 bits
• An interrupt request starts a high performance
Channel 8
automatic data transfer (DTS). Appropriate
Auto start by triggering with timer output
settings of interrupts and registers enable
• D/A converter : 8-bit x 2
hardware automatic data transfer. Various
• High precision PWM outputs : 14-bit x 2
functions can be operated successively and
• Real time outputs : 4-bit x 2
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books,
etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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