LH28F800SU Datasheet, PDF (1/38 Pages) Sharp Electrionic Components – 8M (512K × 16, 1M × 8) Flash Memory

LH28F800SU
FEATURES
• User-Configurable x8 or x16 Operation
• User-Selectable 3.3 V or 5 V V_CC
• 5 V Write/Erase Operations (5 V V_PP)
– No Requirement for DC/DC
Converter to Write/Erase
• 70 ns Maximum Access Time
• Minimum 2.7 V Read capability
– 160 ns Maximum Access Time
(V_CC = 2.7 V)
• 16 Independently Lockable Blocks
• 0.32 MB/sec Write Transfer Rate
• 100,000 Erase Cycles per Block
• Revolutionary Architecture
– Pipelined Command Execution
– Write During Erase
– Command Superset of
Sharp LH28F008SA
• 5 µA (TYP.) I_CC in CMOS Standby
• 1 µA (TYP.) Deep Power-Down
• State-of-the-Art 0.55 µm ETOX™
Flash Technology
• 56-Pin, 1.2 mm × 14 mm × 20 mm
TSOP (Type I) Package
8M (512K × 16, 1M × 8) Flash Memory
56-PIN TSOP
TOP VIEW
WP 56
WE 55
OE 54
RY/BY 53
DQ₁₅ 52
DQ₇ 51
DQ₁₄ 50
DQ₆ 49
GND 48
DQ₁₃ 47
DQ₅ 46
DQ₁₂ 45
DQ₄ 44
V_CC
43
GND 42
DQ₁₁ 41
DQ₃ 40
DQ₁₀ 39
DQ₂ 38
V_CC
37
DQ₉ 36
DQ₁ 35
DQ₈ 34
DQ₀ 33
A₀ 32
BYTE 31
NC 30
NC 29
1 3/5
2 CE₁
3 NC
4 _NC
5
A₁₉
6
A₁₈
7
A₁₇
8
A₁₆
9
V_CC
10 A₁₅
11 A₁₄
12 A₁₃
13 A₁₂
14 _CE0
15 V_PP
16 RP
17 A₁₁
18
A₁₀
19 A₉
20 A₈
21 _GND
22 A₇
23 A₆
24 A₅
25 _A4
26 A₃
27 A₂
28 A₁
28F800SUR-1
Figure 1. TSOP Reverse Bend Configuration
1