LH28F400SUB Datasheet, PDF (1/34 Pages) Sharp Electrionic Components – 4M (512K × 8, 256K × 16) Flash Memory

LH28F400SUB-Z0
4M (512K × 8, 256K × 16)
Flash Memory
FEATURES
• User-Configurable x8 or x16 Operation
• 5 V Write/Erase Operation
(5 V V_PP, 3.3 V V_CC)
– No Requirement for DC/DC Converter to
Write/Erase
• 150 ns Maximum Access Time
(V_CC = 3.3 V ± 0.3 V)
• Min. 2.7 V Read Capability
– 160 ns Maximum Access Time
(V_CC = 2.7 V)
• 32 Independently Lockable Blocks (16K)
• 100,000 Erase Cycles per Block
• Automated Byte Write/Block Erase
– Command User Interface
– Status Register
– RY /» BY» Status Output
• System Performance Enhancement
– Erase Suspend for Read
– Two-Byte Write
– Full Chip Erase
• Data Protection
– Hardware Erase/Write Lockout during
Power Transition
– Software Erase/Write Lockout
• Independently Lockable for Write/Erase
on Each Block (Lock Block and Protect
Set/Reset)
• 4 µA (Typ.) I_CC in CMOS Standby
• 0.2 µA (Typ.) Deep Power-Down
• State-of-the-Art 0.45 µm ETOX™ Flash
Technology
• Extended Temperature Operation
– -20°C to +85°C
• 49-Pin, .67 mm × 8 mm × 8 mm
CSP Package
49-PIN CSP
TOP VIEW
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2
3
4
5
6
7
A A₁
A₄
A₇ V_PP A₉
A₁₂ A₁₅
B A₂ A₅ A₁₇ RP A₈ A₁₁ A₁₄
C A₃ A₆ RY/BY NC WE A₁₀ A₁₃
D A₀ DQ₉ NC NC NC DQ₁₃ A₁₆
E OE DQ₁ DQ₃ DQ₁₁ DQ₄ DQ₆ ^DAQ_-115^/
F GND DQ₈ DQ₁₀ V_CC DQ₁₂ DQ₁₄ GND
G CE DQ₀ DQ₂ V_CC DQ₅ DQ_{7 BYTE}
28F400SUB-1
Figure 1. CSP Configuration
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