SGM8521_17 Datasheet, PDF (8/16 Pages) SG Micro Corp – CMOS Operational Amplifiers

SGM8521/2/4
150kHz, 5.5μA, Rail-to-Rail I/O
CMOS Operational Amplifiers
APPLICATION NOTES
Driving Capacitive Loads
The SGM8521/2/4 can directly drive 250pF in
unity-gain without oscillation. The unity-gain follower
(buffer) is the most sensitive configuration to capacitive
loading. Direct capacitive loading reduces the phase
margin of amplifiers and this result in ringing or even
oscillation. Applications that require greater capacitive
driving capability should use an isolation resistor
between the output and the capacitive load like the
circuit in Figure 1. The isolation resistor R_ISO and the
load capacitor C_L form a zero to increase stability. The
bigger the R_ISO resistor value, the more stable V_OUT will
be. Note that this method results in a loss of gain
accuracy because R_ISO forms a voltage divider with the
R_LOAD.
SGM8521
VIN
RISO
VOUT
CL
For non-buffer configuration, there are two other ways
to increase the phase margin: (a) by increasing the
amplifier’s gain or (b) by placing a capacitor in parallel
with the feedback resistor to counteract the parasitic
capacitance associated with inverting node.
Power-Supply Bypassing and Layout
The SGM8521/2/4 family operates from either a single
+2.1V to +5.5V supply or dual ±1.05V to ±2.75V
supplies. For single-supply operation, bypass the
power supply +V_S with a 0.1µF ceramic capacitor which
should be placed close to the +V_S pin. For dual-supply
operation, both the +V_S and the -V_S supplies should be
bypassed to ground with separate 0.1µF ceramic
capacitors. 2.2µF tantalum capacitor can be added for
better performance.
+VS
10μF
0.1μF
+VS
10μF
0.1μF
Figure 1. Indirectly Driving Heavy Capacitive Load
Vn
An improved circuit is shown in Figure 2. It provides DC
SGM8521
accuracy as well as AC stability. R_F provides the DC _Vp
accuracy by connecting the inverting signal with the
output. C_F and R_Iso serve to counteract the loss of
phase margin by feeding the high frequency
component of the output signal back to the amplifier’s
-VS (GND)
inverting input, thereby preserving phase margin in the
overall feedback loop.
Vn
VOUT
Vp
VOUT
SGM8521
10μF
0.1μF
-VS
CF
SGM8521
VIN
RISO
CL
RF
VOUT
RL
Figure 3. Amplifier with Bypass Capacitors
Figure 2. Indirectly Driving Heavy Capacitive Load with
DC Accuracy
SG Micro Corp
www.sg-micro.com
JANUARY 2017
8