SGM803_15 Datasheet, PDF (8/13 Pages) SG Micro Corp – Microprocessor Supervisory

SGM803/SGM809/SGM810
APPLICATION NOTES
BENEFITS OF AN ACCURATE RESET THRESHOLD
In other microprocessor supervisory circuits, tolerances in
supply voltages lead to an overall increase in reset tolerance
levels due to the deterioration of the microprocessor reset
circuit’s power supply. The possibility of a malfunction during a
power failure is greatly reduced because the SGM803/
SGM809/SGM810 series can operate effectively even when
there are large degradations of the supply voltages. Another
advantage of the SGM803/SGM809/SGM810 series is its very
accurate internal voltage reference circuit. These benefits
combine to produce an exceptionally reliable voltage monitor
circuit.
INTERFACING TO MICROPROCESSORS WITH
MULTIPLE INTERRUPTS
In a number of cases, it is necessary to interface many
interrupts from different devices (for example, thermal, altitude,
and velocity sensors). The SGM803/SGM809/SGM810 can
easily be integrated into existing interrupt-handling circuits, as
shown in Figure 1, or can be used as a standalone device.
PRIORITY ENCODER
74LS147
4-LINE BCD TO
MICROPROCESSOR
Microprocessor Supervisory
Circuit in 3-Pin SOT-23
INTERFACING TO OTHER DEVICES’ OUTPUT
The SGM803/SGM809/SGM810 series is designed to integrate
with as many devices as possible and, therefore, has a
standard output dependent on V_CC. This enables the parts to be
used in both 3V and 5V, or any nominal voltage within the
minimum and maximum specifications for V_CC. This design
simplifies interfacing this device to other devices.
ENSURING A VALID RESET OUTPUT DOWN TO
V_CC = 0V
When V_CC falls below 1.0V, the SGM803/SGM809 RESET no
longer sinks current. A high impedance CMOS logic input
connected to RESET may, therefore, drift to undetermined logic
levels. To eliminate this problem, a 100kΩ resistor should be
connected from RESET to ground.
VCC
VCC
SGM809
RESET
GND
V_CC
V_CC
SGM809
RESET
GND
OTHER SENSING
DEVICES
Figure 1. Interfacing to Microprocessors with Multiple
Interrupts
Figure 2. Ensuring a Valid Reset Output Down to V_CC = 0V
PREVENTING THE HIGH VOLTAGE SPIKE AND
LOW POWER DESIGN
To prevent the high voltage spike damage or input VCC current
limitation low power design, It is always to connect a resistor
R1(0Ω to 1kΩ) in series to VCC, for such application, one
capacitance C1(0.1µF to 4.7µF) should be connected between
VCC Pin and GND. the schematic is shown in Figure 3. The input
resistor will affect output driving capability.
R1
0Ω ~ 1kΩ
IN
C1
0.1µF ~ 4.7µF
VCC
RESET
SGM809
OUTPUT
GND
SG Micro Corp
www.sg-micro.com
Figure 3. Preventing the High Voltage Spike and Low
Power Design
.
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