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GV8500 Datasheet, PDF (9/13 Pages) Semtech Corporation – Pb-free and RoHS compliant
5. Application Information
5.1 PCB Layout
Special attention must be paid to component layout when designing serial digital
interfaces for HDcctv.
An FR-4 dielectric can be used, however, controlled impedance transmission lines are
required for PCB traces longer than approximately 1cm. Note the following PCB artwork
features used to optimize performance:
• The PCB trace width for 1.485Gb/s data rate signals is closely matched to SMT
component width to minimize reflections due to changes in trace impedance
• The PCB ground plane is removed under the GV8500 output components to
minimize parasitic capacitance
• The PCB ground plane is removed under the GV8500 RSET pin and resistor to
minimize parasitic capacitance
• Input and output BNC connectors are surface mounted in-line to eliminate a
transmission line stub caused by a BNC mounting via high-speed traces which are
curved to minimize impedance variations due to change of PCB trace width
5.2 Typical Application Circuit
Differential
Data Input
4u7
49.9
10n
49.9
4u7 VCC
750
DISABLE
SD/HD
GV8500
1
2
3
4
6
DDI
DDI
VEE
RSET
DISABLE
SDO
SDO
SD/HD
VCC
12
11
10
9
VCC
10n
NOTE: All resistors in Ohms, capacitors in Farads,
and inductors in Henrys, unless otherwise noted.
Figure 5-1: Typical Application Circuit
5.6n*
75
VCC
75
75
4u7
10n
75
5.6n*
4u7
BNC
BNC
*Typical value: varies with layout
GV8500 Aviia™ Cable Driver
Data Sheet
57076 - 1
April 2012
9 of 13