GV8500 Datasheet, PDF (7/13 Pages) Semtech Corporation – Pb-free and RoHS compliant

4. Detailed Description
4.1 Input Interfacing
DDI/DDI are high impedance differential inputs. The equivalent input circuit is shown in
Figure 3-1.
Several conditions must be observed when interfacing to these inputs:
• The differential input signal amplitude must be between 100 and 2200mVpp
• The common mode voltage range must be as specified in the DC Electrical
Characteristics on page 4
• For input trace lengths longer than approximately 1cm, the inputs should be
terminated as shown in the Typical Application Circuit
The GV8500 inputs are self-biased, allowing for simple AC-coupling to the device. For
serial digital video, a minimum capacitor value of 4.7μF should be used to allow
coupling of pathological test signals. A tantalum capacitor is recommended.
SD/HD Input Pin
The GV8500 SDO rise and fall times can be set to comply with both HDcctv 1.0, ST 292,
ST 424 and ST 259. At 270Mb/s (ST 259) or any data rate that requires longer rise and fall
time characteristics, the SD/HD pin must be set HIGH by the application layer.
For HDcctv 1.0, ST 292 and ST 424 standards and signals which require faster rise and
fall times, this pin should be set LOW.
4.2 Output Interfacing
The GV8500 outputs are current mode, and will drive typically 800mV into a 75Ω load.
These outputs are protected from accidental static damage with internal ESD protection
diodes.
In order for a DDI output circuit using the GV8500 to meet this specification, the output
application circuit shown in the Typical Application Circuit on page 9 is recommended.
The value of L_COMP will vary depending on the PCB layout, with a typical value of 5.6nH.
A 4.7μF capacitor is used for AC-coupling the output of the device. This value is chosen
to ensure that pathological signals can be coupled without a significant DC component
occurring. Please see Application Information on page 9 for more details.
GV8500 Aviia™ Cable Driver
Data Sheet
57076 - 1
April 2012
7 of 13