EDGE629 Datasheet, PDF (6/16 Pages) Semtech Corporation – 1 GHz Timing Deskew and Quad Fanout Element

Edge629
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
Falling Edge Adjustment
There is a limitation on FEA range vs. pulse width.
The falling edge of a signal may be adjusted to compen-
sate for any system level pulse width distortion that may
occur. Falling edge adjust (FEA) is accomplished using an
analog delay cell and an on-chip 7 bit DAC (see Figure 3).
FEA may be bypassed completely by a multiplexer. Also,
FEA affects only the propagation delay of the falling edge.
It has no effect on the propagation delay of a rising edge.
Input Pulse Width
1.0 ns
900 ps
800 ps
700 ps
FEA Range
±250 ps
±250 ps
±250 ps
±250 ps
Each channel has its own unique FEA setting and may be
programmed independently from all other channels. The
FEA of any channel will not affect the propagation delay of
any other channel, nor will FEA affect the propagation delay
of a rising edge.
SFE DAC Code
Falling Edge
Delay
Resolution
600 ps
500 ps
±200 ps
±100 ps
Falling Edge Adjust DAC Outputs
DAC_FALL_(0–3) are analog voltage outputs from the on-
board DACs which program the falling edge delay elements
of each channel.
0
XXXXXXX
FEA Bypassed
N/A
DAC_FALL_(0-3) pins are for test purposes only. Nothing
should be connected to these pins.
1
0000000
1
1111111
–250 ps
+250 ps
7 Bit DAC
2.5 ps
2.5 ps
Thermal Monitor
The Edge629 features a thermal diode string consisting
of 5 diodes as shown in Figure 4 below. This string allows
accurate die temperature measurements.
ANODE
Bias Current
∆T
Temperature Coefficient = –7.8 mV/˚C
SFE
Figure 3. Falling Edge Adjust Architecture
CATHODE
Figure 4. Thermal Diode String
When an external bias current of up to 100 µA is injected
through the string, the voltage measured across the AN-
ODE and CATHODE pins maps directly to the Edge629
junction temperature (see Figure 5).
 2005 Semtech Corp. Rev. 3, 8/1/05
6
www.semtech.com