UR6HCPS2-SP40 Datasheet, PDF (5/22 Pages) Semtech Corporation – Converts PS/2 Data to Serial or SPI

COMMUNICATIONS INTERFACE FOR THE UR6HCPS2-SP40
The UR6HCPS2-SP40 offers two
modes of serial communications:
"Synchronous Peripheral Interface"
(SPI) mode and the "Asynchronous
Serial Interface" (ASI) mode.
The diagrams below illustrate the SPI and ASI communications interfaces,
respectively.
SPI Communications Interface
The IC determines the mode of
communication with the Host during
power-up by reading the value of
the ASI/_SPI_SEL pin. If the pin is
tied high, the ASI mode is enabled.
If it is low, the SPI interface is
enabled.
Host
(master)
MOSI
MISO
SCLK
_SS1
_ATN
_SS2
The PS2Adapt^TM implements the SPI
mode by single direction
communication that supports bit
PS2Adapt^TM
(slave)
Slave 2
rates up to 250 Kb/s. Several Hosts
and companion chips implement
the SPI protocol in order to
communicate with a wide range of
peripherals such as EEPROMs, A/D _{ASI Communications Interface}
converters, MCUs and other system
components.
The UR6HCPS2-SP40 deploys the
_ATN as an additional hand-shake
signal in order to support low power
operation of the bus.
The PS2Adapt^TM implements the ASI
mode at fixed preselected baud
rates: 300bps, 600bps, 1200bps,
9600bps, 19200bps, 31250bps and
62500bps, depending on the
Configuration pins’ state on power
up.
In ASI mode, the UR6HCPS2-SP40
deploys the _RTS & _CTS as
additional hand-shake signals in
order to support low power
operation of the bus.
_CTS
_RTS
RxD
TxD
HOST
_CTS
_RTS
RxD
TxD
UR6HCPS2-SP40
Copyright Semtech, 2002-2001
5
DOC6-PS2-SP40-DS-102
www.semtech.com