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GX3246 Datasheet, PDF (38/47 Pages) Semtech Corporation – Crosspoint Switch with Trace Equalization and Output De-emphasis | |||
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4.12.1.4 APPI External Timing for Auto-Increment Read
P_CS
t SCS_r
P_R/W
t SRW_r
P_ADD
[11:0]
t SA_r
P_DAT
[15:0]
P_ADS
An[11:0]
t DNZ
t DO1
t HA_r
Dn [15:0]
t DX
t DO2
Dn+1 [15:0]
t PW1_r
t ADSH_r
t PW2_r
t HCS_r
t CSH_r
t CDZ
t HRW_r
t RDZ
t DtXDO2
Dn+2 [15:0]
t DX
t ADSH_r
t PW2_r
Figure 4-9: External Timing for Auto-Increment Read Cycle
Table 4-16: APPI External Timing Specifications for Auto-Increment Read
Parameter
Symbol
Equiv.
Cycles
Internal read pipeline delay (0 if one-cycle read)
â
1
P_CS LOW before first P_ADS positive edge
tSCS_r
â
P_CS hold time after last P_ADS positive edge
tHCS_r
â
P_R/W HIGH before P_CS negative edge
tSRW_r
â
P_R/W hold time after last P_ADS positive edge
tHRW_r
â
P_ADD[11:0] setup before P_ADS negative edge
tSA_r
â
P_ADD[11:0] hold after P_ADS positive edge
tHA_r
â
P_DAT[15:0] out of tristate after P_ADS negative edge
tDNZ
2
P_DAT[15:0] becomes valid after first P_ADS negative edge
tDO1
â
P_DAT[15:0] becomes valid after P_ADS positive edge
tDO2
â
P_DAT[15:0] becomes invalid after P_ADS positive edge
tDX
â
P_DAT[15:0] goes tristate after P_CS positive edge
tDZ
â
P_DAT[15:0] goes tristate after P_ADS positive edge
tDZ
â
P_ADS first LOW pulse width
tPW1_r
â
P_ADS subsequent LOW pulse widths
tPW2_r
1.2
P_ADS HIGH between pulses
tADSH_r
1.2
P_CS HIGH before next read/write cycle
tCSH_r
5
Frequency during auto-increment read
â
â
Frequency for back-to-back single reads in auto-increment
mode
â
â
Min
â
5.0
5.0
1.5
5.0
0.0
0.0
14.8
â
â
3.0
12.0
12.0
70.0
8.9
8.9
37.0
â
â
Typ Max Units
â
â
â
â
â
ns
â
â
ns
â
â
ns
â
â
ns
â
â
ns
â
â
ns
â
â
ns
â
70.0
ns
â
13.0
ns
â
â
ns
â
45.0
ns
â
45.0
ns
â
â
ns
â
â
ns
â
â
ns
â
â
ns
â
56.25 MHz
â
8.54 MHz
GX3246 290 x 146 3.5Gb/s Crosspoint
Final Data Sheet Rev. 2
GENDOC-056078 March 2013
www.semtech.com
38 of 47
Proprietary & Confidential
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