GX3246 Datasheet, PDF (35/47 Pages) Semtech Corporation – Crosspoint Switch with Trace Equalization and Output De-emphasis

Table 4-12: APPI Inputs/Outputs
Signal Name I/O Description
P_CS
P_ADS
P_R/W
P_ADD[11:0]
P_DAT[15:0]
I
Chip Select from the host.
Address/Data Strobe from the host; used to “clock” address and
I
write data into the chip, and to “clock” read data out of the
chip.
I
Read/Write indication from the host; HIGH for read, LOW for
write.
I
Address from the host.
I/O
Write data from the host, or read data to the host.
4.12.1.1 APPI External Timing for Normal Write
P_CS
P_R/W
P_ADD
[11:0]
t SR W_w
P_DAT
[15:0]
t _{SC S_w}
t _{H C S_w}
t _{CSH_w}
A[11:0]
t _{SA_w}
D[15:0]
t _{SD_w}
t _{HRW_w}
t _{HA_w}
t _{H D_w}
P_ADS
t _{PW_w}
Figure 4-6: External Timing for Normal Write Cycle
Table 4-13: APPI External Timing Specifications for Normal Write
Parameter
Symbol
Equiv.
Cycles
Min
Typ
Max Units
P_CS LOW before P_ADS positive edge
t_{SCS_w}
—
10.0
—
—
ns
P_CS hold time after P_ADS positive edge
t_{HCS_w}
2
14.8
—
—
ns
P_R/W low before P_CS negative edge
t_{SRW_w}
—
1.5
—
—
ns
P_R/W hold time after P_ADS positive edge
t_{HRW_w}
2
14.8
—
—
ns
P_ADD[11:0] setup before P_ADS positive edge
t_{SA_w}
—
10.0
—
—
ns
P_ADD[11:0] hold after P_ADS positive edge
t_{HA_w}
—
5.0
—
—
ns
P_DAT[15:0] setup before P_ADS positive edge
t_{SD_w}
—
5.0
—
—
ns
P_DAT[15:0] hold after P_ADS positive edge
t_{HD_w}
—
5.0
—
—
ns
P_ADS LOW pulse width
t_{PW_w}
0.6
4.4
—
—
ns
GX3246 290 x 146 3.5Gb/s Crosspoint
Final Data Sheet Rev. 2
GENDOC-056078 March 2013
www.semtech.com
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