GS2985 Datasheet, PDF (27/45 Pages) Gennum Corporation – Uses standard 27MHz crystal

When the DATA/CLOCK pin is set HIGH, the DDO1/RCO pin will output a copy of the
serial digital output.
When the DATA/CLOCK pin is set LOW, the DDO1/RCO pin will output a copy of the
recovered clock signal.
Table 4-10: Configuration of GS2985 Output Drivers and Mute/Disable Pins
DATA_MUTE
1
1
0
0
1
0
DDO1_DISABLE
1
1
1
1
0
0
DATA/CLOCK
0
1
0
1
X
X
DDO0
DATA
DATA
MUTE
MUTE
DATA
MUTE
DDO1/RCO
CLOCK
DATA
CLOCK
MUTE
Power down
Power down
4.15 Host Interface
4.15.1 Introduction
The GS2985 offers a Serial Peripheral Interface (SPI) to access advanced features and
programmability. The polarity of the HIF pin tells the GS2985 whether or not the host
interface is active (HIF = 0) or in legacy mode (HIF = 1).
Using the host interface, it is possible to override the control pin settings, and such
settings will persist until the device has been powered-down and/or reset. The host
interface is capable of reading hard-wired pin configuration, pin override settings and
the values of all status monitoring pins.
There is an optional 3-state feature available in the Control Status Registers (CSR) that
puts the SPI SDO to high-impedance when it’s not being used (Register: TOP_1, Bit: 2).
The maximum operating speed of the SPI is 10MHz.
4.15.2 Legacy Mode & Start-up
In legacy mode, basic configuration of the device (including a subset of equalizer and
de-emphasis settings) are available at the pin level. In this mode, register settings are
automatically set to default so that the GS2985 is live at power-up.
4.15.3 Host Interface Mode & Start-up
In host interface mode, the user gains access to Control and Status Registers (CSRs) that
manage advanced features. In this mode, equalizer and de-emphasis settings are set
through the CSR.
The SPI control port is functional at start-up without the need for a separate, external
reset signal. However, all internal registers must be set to their default state by issuing a
required Reset Command via the SPI.
GS2985 Multi-Rate SDI Reclocker with Equalization &
De-emphasis
Data Sheet
36663 - 5
July 2012
27 of 45
Proprietary & Confidential