GS1582 Datasheet, PDF (18/115 Pages) Gennum Corporation – Multi-Rate Serializer with Cable Driver, Audio Multiplexer and ClockCleaner™

Table 1-1: Pin Descriptions (Continued)
Pin
Number
K4
K5
K6
K7
K9
K10
Name
AIN_7/8
ACLK_2
AIN_3/4
ACLK_1
CS_TMS
SDIN_TDI
Timing
Type Description
Synchronous
with ACLK_2
Clock
Synchronous
with ACLK_1
Clock
Synchronous
with
SCLK_TCK
Synchronous
with
SCLK_TCK
Input
Input
Input
Input
Input
Input
Serial Audio Input; Channels 7 and 8.
3.072MHz audio clock for Audio Group 2 (channels 5-8).
Serial Audio Input; Channels 3 and 4.
3.072MHz audio clock for Audio Group 1(channels 1-4).
COMMUNICATION SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Chip Select / Test Mode Start.
Host Mode (JTAG/HOST = LOW)
CS_TMS operates as the host interface chip select, CS, and is active
LOW.
JTAG Test Mode (JTAG/HOST = HIGH)
CS_TMS operates as the JTAG test mode start, TMS, used to control
the operation of the JTAG test, and is active HIGH.
NOTE: If the host interface is not being used, tie this pin HIGH.
COMMUNICATION SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Serial Data In / Test Data Input
Host Mode (JTAG/HOST = LOW)
This pin operates as the host interface serial input, SDIN, used to
write address and configuration information to the internal
registers of the device.
JTAG Test Mode (JTAG/HOST = HIGH)
This pin is used to shift and operates as the JTAG test data input,
TDI.
NOTE: If the host interface is not being used, tie this pin HIGH.
GS1582 Multi-Rate Serializer with Cable Driver, Audio
Multiplexer and ClockCleaner^TM
Data Sheet
40117 - 4
December 2011
18 of 115