SC1486 Datasheet, PDF (14/17 Pages) Semtech Corporation – Dual Synchronous Buck Pseudo Fixed Frequency DDR Power Supply Controller

POWER MANAGEMENT
Application Information (Cont.)
DDR Supply Selection
The SC1486 can be configured so that VTT and VDQ are
generated directly from the battery. Alternatively, the VTT
supply can be generated from the VDDQ supply. Since
the battery configuration generally yields better efficiency
and performance, the eval board is configured to
generate both supplies from the battery.
DDR Reference Buffer
The reference buffer is capable of driving 3ma and sinking
25ua. Since the output is class A, if additional sinking i s
required an external pulldown resistor can be added.
Make sure that the ground side of this pulldown is tied
to the VTT AGND plane near the AGND2 pin of the
SC1486.
As with most opamps, a small resistor is required when
driving a capacitive load. To ensure stability use either a
10 ohm resistor in series with a 1uf capacitor or a 100
ohm resistor in series with a 0.1uF capacitor from
REFOUT to AGND2.
REFIN should also be filtered so that VDDQ ripple does
not appear at the REFIN pin. If a resistor divider is used
to create REFIN from VDDQ, then a 0.1uF capacitor from
REFIN to AGND2 will provide adequate filtering.
SC1486
 2002 Semtech Corp.
14
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