GS2970A Datasheet, PDF (121/150 Pages) Gennum Corporation – Integrated audio clock generator

Table 4-28:SD Audio Core Configuration and Status Registers (Continued)
Address Register Name Bit Name
42Ah
PRIM_AUD_
DELAY_7
RSVD
DEL3A_7
EBIT3A
42Bh
PRIM_AUD_
DELAY_8
RSVD
DEL3A_8
42Ch
PRIM_AUD_
DELAY_9
RSVD
DEL3A_9
42Dh
PRIM_AUD_
DELAY_10
RSVD
DEL4A_10
EBIT4A
42Eh
PRIM_AUD_
DELAY_11
RSVD
DEL4A_11
42Fh
PRIM_AUD_
DELAY_12
RSVD
DEL4A_12
430h
AFNB12
RSVD
AFN1_2B
431h
AFNB34
RSVD
AFN3_4B
432h
RATEB
RSVD
RATE3_4B
ASX3_4B
RATE1_2B
ASX1_2B
433h
ACT_B
RSVD
ACTB
Bit
15-9
8-1
0
15-9
8-0
15-9
8-0
15-9
8-1
0
15-9
8-0
15-9
8-0
15-9
8-0
15-9
8-0
15-8
7-5
4
3-1
0
15-4
3-0
Description
Reserved.
Primary Audio group delay data
for channel 3.
Primary Audio group delay data
valid flag for channel 3.
Reserved.
Primary Audio group delay data
for channel 3.
Reserved.
Primary Audio group delay data
for channel 3.
Reserved.
Primary Audio group delay data
for channel 4.
Primary Audio group delay data
valid flag for channel 4.
Reserved.
Primary Audio group delay data
for channel 4.
Reserved.
Primary Audio group delay data
for channel 4.
Reserved.
Secondary group audio frame
number for channels 1 and 2.
Reserved.
Secondary group audio frame
number for channels 3 and 4.
Reserved.
Secondary group sampling
frequency for channels 3 and 4.
Secondary group asynchronous
mode for channels 3 and 4.
Secondary group sampling
frequency for channels 1 and 2.
Secondary group asynchronous
mode for channels 1 and 2.
Reserved.
Secondary group active channels.
R/W
R/W
R
Default
0
0
R
0
R/W
0
R
0
R/W
0
R
0
R/W
0
R
0
R
0
R/W
0
R
0
R/W
0
R
0
R/W
0
R
0
R/W
0
R
0
R
0
R
0
R
0
R
0
R
0
R/W
0
R
0
GS2970A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54244 - 2
September 2012
121 of 150