SKYPER32R_0701 Datasheet, PDF (11/16 Pages) Semikron International – IGBT Driver Core

SKYPER™ 32 R
Dead Time generation (Interlock TOP / BOT) (DT)
The DT circuit prevents, that TOP and BOT IGBT of one half bridge are switched on at the same time (shoot through). The
dead time is not added to a dead time given by the controller. Thus the total dead time is the maximum of "built in dead time"
and "controller dead time". It is possible to control the driver with one switching signal and its inverted signal.
Please note:
The generated dead time is fixed and cannot be changed.
Pulse pattern – DT
ƒ The total propagation delay of the driver is the sum of
interlock dead time (tTD) and driver input output signal
propagation delay (td(on;off)IO) as shown in the pulse pattern.
Moreover the switching time of the IGBT chip has to be taken
into account (not shown in the pulse pattern).
ƒ In case both channel inputs (PRIM_TOP_IN and
PRIM_BOT_IN) are at high level, the IGBTs will be turned off.
ƒ If only one channel is switching, there will be no interlock
dead time.
Please note:
No error message will be generated when overlap of switching signals occurs.
Dynamic Short Circuit Protection by VCEsat monitoring / de-saturation monitoring (DSCP)
The DSCP circuit is responsible for short circuit sensing. It monitors the collector-emitter voltage VCE of the IGBT during its
on-state. Due to the direct measurement of VCEsat on the IGBT's collector, the DSCP circuit switches off the IGBTs and an
error is indicated.
The reference voltage VCEref may dynamically be adapted to the IGBTs switching behaviour. Immediately after turn-on of the
IGBT, a higher value is effective than in steady state. This value will, however, be reset, when the IGBT is turned off. VCEstat
is the steady-state value of VCEref and is adjusted to the required maximum value for each IGBT by an external resistor RCE.
It may not exceed 10V. The time constant for the delay (exponential shape) of VCEref may be controlled by an external
capacitor CCE, which is connected in parallel to RCE. It controls the blanking time tbl which passes after turn-on of the IGBT
before the VCEsat monitoring is activated. This makes an adaptation to any IGBT switching behaviour possible.
Reference Voltage (VCEref) Characteristic
After tbl has passed, the VCE monitoring will be triggered as soon as VCEsat > VCEref and will turn off the IGBT. The error
memory will be set, and the output PRIM_nERROR_OUT changes to the HIGH state. Possible failure modes are shows in
the following pictures.
11
2007-01-19 – Rev05
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