LC877424A Datasheet, PDF (8/22 Pages) Sanyo Semicon Device – 8 Bit Single Chip Microcontroller Incorporating 48K/40K/32K/24K Byte ROM and 1536 byte RAM on Chip

Pin Description
Pin name
I/O
VSS1,
-
VSS2,
VSS3
VDD1,
-
VDD2,
VDD3
PORT 0
I/O
P00 to P07
PORT 1
I/O
P10 to P17
PORT 3
I/O
P30 to P35
PORT 7
I/O
P70 to P73
LC877448A/40A/32A/24A
• Power supply (-)
Function
Option
No
• Power supply (+)
No
• 8 bit input / output port
Yes
• Data direction programmable in nibble units
• Use of pull-up resistor can be specified in nibble units
• Input for HOLD release
• Input for port 0 interrupt
• 8 bit input / output port
Yes
• Data direction programmable for each bit
• Use of pull-up resistor can be specified for each bit individually
• Other pin functions
P10: SIO0 data output
P11: SIO0 data input or bus input / output
P12: SIO0 clock input / output
P13: SIO1 data output
P14: SIO1 data input or bus input / output
P15: SIO1 clock input / output
P16: Timer 1 PWML output
P17: Timer 1 PWMH output / Buzzer output
• 6 bit input / output port
Yes
• Data direction can be specified for each bit
• Use of pull-up resistor can be specified for each bit individually
• Other functions
P30 to P33: INT4 input / HOLD release input / Timer 1 event input /
Timer 0L capture input / Timer 0H capture input
P34 to P35: INT5 input / HOLD release input / Timer 1 event input /
Timer 0L capture input / Timer 0H capture input
• Interrupt detection selection
Rising
Falling
Rising and falling H level L level
INT4
Yes
Yes
INT5
Yes
Yes
Yes
No
No
Yes
No
No
• 4 bit input / output port
No
• Data direction can be specified for each bit
• Use of pull-up resistor can be specified for each bit individually
• Other functions
P70: INT0 input / HOLD release input / Timer 0L capture input / output for watchdog
timer
P71: INT1 input / HOLD release input / Timer 0H capture input
P72: INT2 input / HOLD release input / Timer 0 event input / Timer 0L capture input
P73: INT3 input (noise rejection filter attached) / Timer 0 event input / Timer 0H
capture input
AD input port: AN8 (P70), AN9 (P71)
• Interrupt detection selection
Rising
Falling
Rising and falling H level L level
INT0
Yes
Yes
INT1
Yes
Yes
INT2
Yes
Yes
INT3
Yes
Yes
No
Yes
Yes
No
Yes
Yes
Yes
No
No
Yes
No
No
PORT 8
P80 to P87
I/O
• 8 bit input / output port
• Input / output can be specified for each bit individually
• Other functions:
AD input ports: AN0 to AN7
Small signal detector input port: MICIN (P87)
No
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