|
LC66P5316 Datasheet, PDF (7/28 Pages) Sanyo Semicon Device – Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM | |||
|
◁ |
LC66P5316
Continued from preceding page.
Pin
I/O
Overview
Output driver type
Options
I/O ports P50 to P53
⢠Input or output in 4-bit or 1-bit units
⢠Input or output in 8-bit units when used
P50/A11
in conjunction with P40 to P43.
P51/A12
P52/A13
I/O
⢠Can be used for output of 8-bit ROM
data when used in conjunction with
P53/INT2/TA
P40 to P43.
⢠Pch: Pull-up MOS type
⢠Nch: Intermediate sink current
type
⢠Pull-up MOS or
Nch OD output
⢠Output level on
reset
⢠P53 is also used as the INT2 interrupt
request.
⢠Used as address pins in EPROM mode
State after a Standby mode
reset
operation
Hold mode:
Output off
High or low
(option)
Halt mode:
Output
retained
P60/SI1
P61/SO1
P62/SCK1
P63/PIN1
I/O ports P60 to P63
⢠Input or output in 4-bit or 1-bit units
⢠P60 is also used as the serial input SI1
pin.
I/O
⢠P61 is also used as the serial output
SO1 pin.
⢠P62 is also used as the serial clock
⢠Pch: CMOS type
⢠Nch: Intermediate sink current
type
⢠CMOS or Nch OD
output
SCK1 pin.
⢠P63 is also used for the event count
input to timer 1.
Hold mode:
Output off
H
Halt mode:
Output
retained
P80/DS0
P81/DS1
P82
P83
Dedicated output ports P80 to P83
⢠Output in 4-bit or 1-bit units
O
⢠The contents of the output latch are
input using input instructions.
⢠P80 is a data shaper input (options)
⢠P81 is a data shaper output (options)
⢠Pch: CMOS type
⢠Nch: Intermediate sink current
type
⢠CMOS or Nch OD
output
⢠Output level at
reset
⢠Data shaper
circuit
High or low
(option)
Hold mode:
Output off
Halt mode:
Output
retained
PC0
PC1
PC2/INV2I/
CE
PC3/INV2O/
DASEC
I/O
I/O ports PC0 to PC3
⢠Output in 4-bit or 1-bit units
⢠Dedicated inverter circuits (option)
⢠Used as the control CE and DASEC
pin in EPROM mode.
⢠Pch: CMOS type
⢠Nch: Intermediate sink current
type
⢠CMOS or Nch OD
output
⢠Inverter circuits
Hold mode:
Output off
H
Halt mode:
Output
retained
PD0/AN1/
INV3I
PD1/AN2/
INV3O
PD2/AN3/
INV4I
PD3/AN4/
INV4O
I
Dedicated input ports PD0 to PD3
⢠Can be switched in software to function
as 16-value analog inputs.
⢠Dedicated inverter circuits (option)
⢠Only when the inverter circuit
option is selected:
⢠Pch: CMOS type
⢠Nch: Intermediate sink current
type
Inverter circuits
PE0/XT1
PE1/XT2
I
Dedicated input ports and sub-oscillator
connections
OSC1
OSC2
RES/VPP/
OE
I System clock oscillator connections
When an external clock is used, leave
O OSC2 open and connect the clock signal
to OSC1.
System reset input
⢠When the P33/HOLD pin is at the high
I
level, a low level input to the RES pin
will initialize the CPU.
⢠Used as the VPP/OE pin in EPROM
mode.
TEST/
EPMOD
CPU test pin
I This pin must be connected to VSS
during normal operation.
VDD
VSS
Power supply pins
Note: Pull-up MOS type: The output circuit includes a MOS transistor that pulls the pin up to VDD.
CMOS output: Complementary output.
OD output: Open-drain output.
Sub-oscillator/port
PE selection
Ceramic oscillator
or external clock
selection
Normal
input
Inverter
⢠Hold mode:
Output off
⢠Halt mode:
Output
continues
Option
selection
Option
selection
Hold mode:
Oscillator stops
Halt mode:
Oscillator
continues
No. 5489-7/28
|
▷ |