English
Language : 

LC66P5316 Datasheet, PDF (17/28 Pages) Sanyo Semicon Device – Four-Bit Single-Chip Microcontroller with 16 KB of On-Chip OTP PROM
LC66P5316
Continued from preceding page.
Parameter
Symbol
Conditions
min
typ
max
Unit Note
[Pulse conditions]
INT0 high and low-level
INT0: Figure 6, conditions under which the INT0
interrupt can be accepted, conditions under
tIOH, tIOL which the timer 0 event counter or pulse width
2
measurement input can be accepted
Tcyc
High and low-level pulse widths
INT1, INT2: Figure 6, conditions under which
for interrupt inputs other than INT0 tIIH, tIIL the corresponding interrupt can be accepted
2
Tcyc
PIN1 high and low-level
PIN1: Figure 6, conditions under which the
pulse widths
tPINH, tPINL timer 1 event counter input can be accepted
2
Tcyc
RES high and low-level
pulse widths
RES: Figure 6, conditions under which reset
tRSH, tRSL can be applied.
3
Tcyc
Operating current drain
Halt mode current drain
IDD OP
IDDHALT
VDD: 4-MHz ceramic oscillator
VDD: 4-MHz external clock
VDD: 4-MHz ceramic clock
VDD: 32 kHz (main oscillator stopped),
sub-oscillator: crystal
6.0
12
6.0
12
4.0
8
100
500
mA
8
mA
mA
µA
Hold mode current drain
IDDHOLD VDD: VDD = 1.8 to 5.5 V
0.01
10
µA
Note: 1. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. These pins cannot be used as input pins if the
CMOS output specifications are selected.When the port option is selected for PE.
2. With the output Nch transistor off in shared I/O ports with the open-drain output specifications. The rating for the pull-up output specification pins is
stipulated in terms of the output pull-up current IPO. These pins cannot be used as input pins if the CMOS output specifications are selected.
3. With the output Nch transistor off for CMOS output specification pins. (Also applies when the Pch open-drain option is selected for P8.)
4. With the output Nch transistor off for pull-up output specification pins.
5. When CMOS output specifications are selected for P8.
6. With the output Nch transistor off for open-drain output specification pins.
7. With the output Pch transistor off for open-drain output specification pins.
8. Reset state
Comparator Characteristics at Ta = –30 to +70°C, VSS = 0 V
Parameter
Symbol
Conditions
Absolute precision
VCECM AN1 to AN4: VDD = 4.0 to 5.5 V
Threshold voltage
VTHCM VDD = 4.0 to 5.5 V
Input voltage
VINCM AN1 to AN4: VDD = 4.0 to 5.5 V
Conversion time
TCCM VDD = 4.0 to 5.5 V
Note: 1. Does not include the quantization error.
min
typ
max
Unit Note
±1/2
±1
LSB
1
VSS
VDD
V
VSS
VDD
V
30
µs
OSC1 (OSC2)
External clock OPEN
textL
textH
textF
textR
1/fext
VDD
0.8VDD
0.2VDD
VSS
Figure 1 External Clock Input Waveform
No. 5489-17/28