LC72358N Datasheet, PDF (6/13 Pages) Sanyo Semicon Device – Single-Chip PLL Microcontrollers

LC72358N, 72362N, 72366
Pin Functions
Pin No.
Symbol
I/O
I/O type
30
PA0
29
28
PA1
PA2
I
Pull-down resistor
included Input
27
PA3
Function
Key return signal input-only ports. The threshold voltage is set to a relatively low value.
When a key matrix is formed in combination with the PB and PC ports, up to three
simultaneous key presses can be detected.
The pull-down resistors are set by the IOS instruction with PWn = 2 for all four pins at the
same time and cannot be set on an individual pin basis.
Input is disabled in clock stop mode.
26
PB0
25
PB1
24
PB2
Key source signal output-only ports. Since the output transistor circuit is an unbalanced
23
22
PB3
PC0
O
Unbalanced CMOS
push-pull
CMOS structure, diodes to prevent shorting due to multiple key presses are not required.
In clock stop mode, these pins go to the output high-impedance state.
During the power-on reset, these pins go to the output high-impedance state and hold that
21
PC1
state until an output instruction is executed.
20
PC2
19
PC3
18
PD0
17
PD1
O CMOS push-pull
16
PD2
15
PD3
Output-only ports.
In clock stop mode, these pins go to the output high-impedance state.
During the power-on reset, these pins go to the output high-impedance state and hold that
state until an output instruction is executed.
14
PE0
13
PE1/SCK2
12
PE2/SO2
11
PE3/SI2
10
PF0
9
PF1/SCK1
I/O CMOS push-pull
8
PF2/SO1
7
PF3/SI1
6
PG0
5
PG1/SCK0
4
PG2/SO0
3
PG3/SI0
General-purpose I/O port/serial I/O pin shared-function ports.
The F and G port inputs are Schmitt inputs. The E ports is a normal input.
The IOS instruction switches these ports between general-purpose I/O ports and serial I/O
ports, and between input and output for general-purpose I/O ports.
• When used as general-purpose I/O ports these pins:
Can be set for input or output in bit units (bit I/O), and
are set for use as general-purpose I/O ports by the IOS instruction with PWn = 0.
b0 = SI/O 0
0 ...................general-purpose port
b1 = SI/O 1
1 ...................SI/O port
b2 = SI/O 2
are set for input or output by the IOS instruction in bit units.
PE..............PWn = 4
0 ...................Input
PF..............PWn = 5
1 ...................Output
PG .............PWn = 6
• When used as serial I/O ports these pins:
Are set for serial I/O port use by the IOS instruction with PWn = 0, and
are accessed by reading and writing the serial I/O data buffer with the INR and OUTR
instructions.
Note: Pin setup states when used as serial I/O ports:
PE0, PF0, PG0 ......General-purpose I/O
PE1, PF1, PG1 ......SCK output in internal clock mode
SCK input in external clock mode
PE2, PF2, PG2......SO output
PE3, PF3, PG3......SI input
In clock stop mode, input is disabled and these pins go to the high-impedance state.
During the power-on reset, these pins become general-purpose input ports.
1
XIN
I
—
80
XOUT
O
78
EO1
O CMOS tristate
77
EO2
Connections for a 4.5 MHz crystal oscillator
Main charge pump outputs
These pins output a high level when the frequency generated by dividing the local
oscillator signal frequency by N is higher than the reference frequency, and a low level
when that frequency is lower.
These pins go to the high-impedance state when the frequencies match.
These pins go to the high-impedance state when the HOLD pin is set low in the hold
enable state.
In clock stop mode, during the power-on reset and in the PLL stop state, these pins go to
the high-impedance state.
Continued on next page.
No. 5065-6/13