LV8092GQ Datasheet, PDF (5/12 Pages) Sanyo Semicon Device – Bi-CMOS LSI Piezo Actuator Driver IC

LV8092GQ
I²C bus transfer method
Start and stop conditions
The I²C bus requires that the state of SDA be preserved while SCL is high as shown in the timing diagram below during
a data transfer operation.
SCL
SDA
ts2
th2
When data is not being transferred, both SCL and SDA are in the high state. The start condition is generated and access is
started when SDA is changed from high to low while SCL and SDA are high.
Conversely, the stop condition is generated and access is ended when SDA is changed from low to high while SCL is
high.
Start condition
Stop condition
SCL
SDA
th1
th3
Data transfer and acknowledgement response
After the start condition is generated, data is transferred one byte (8 bits) at a time. Any number of data bytes can be
transferred consecutively.
An ACK signal is sent to the sending side from the receiving side every time 8 bits of data are transferred. The
transmission of an ACK signal is performed by setting the receiving side SDA to low after SDA at the sending side is
released immediately after the clock pulse of SCL bit 8 in the data transferred has fallen low.
After the receiving side has sent the ACK signal, if the next byte transfer operation is to receive only the byte, the
receiving side releases SDA on the falling edge of the 9th clock of SCL.
There are no CE signals in the I²C bus ; instead, a 7-bit slave address is assigned to each device, and the first byte of the
transfer data is allocated to the 7-bit slave address and to the command (R/W) which specifies the direction of subsequent
data transfer.
The LB8092GQ is a drive IC with a dedicated write function and it does not have a read function.
The 7-bit address is transferred in sequence starting with MSB, and the eighth bit is set to low. The second and subsequent
bytes are transferred in write mode.
In the LV8092GQ, the slave address is stipulated to be “1110010.”.
Start
M
S
Slave address
L
S
A
WC
M
S
Register address
L
S
A
C
M
S
B
B
KB
BKB
Data
LA
SC
BK
Stop
SCL
SDA
1110101
00000010 00010001
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