LV8092GQ Datasheet, PDF (11/12 Pages) Sanyo Semicon Device – Bi-CMOS LSI Piezo Actuator Driver IC

LV8092GQ
Timing charts
Enlarged view of the sequence of output signals
Operation toward infinity
(RST setting + 1) ×
number of clock pulses
(GTAS setting - 1) ×
number of clock pulses
(GTAS setting - 1) ×
number of clock pulses
OUT1
(GTAS setting - 1) × number of clock pulses
OUT2
Operation toward macro
OUT1
OUT2
(GTBR setting -1) × number of clock pulses
(RST setting + 1) ×
number of clock pulses
(GTBR setting -1) × number of clock pulses
(GTBS setting - 1) × number of clock pulses
(GTAS setting - 1) ×
number of clock pulses
(GTAS setting - 1) ×
number of clock pulses
Sequence of initial setting operation (“on” or “off” can be set by the I²C settings.)
When M/I register = 00 → Movement toward infinity position
Startup when EN is high, initial setting sequence starts
EN
OUT1
OUT2
BUSY
1 period
Operation toward infinity
STP period × INIT times
Standby state
Operation toward macro
STP period × 4 STP period × RET setting times
Initial setting operation time
High during initial setting in wait state too
BUSY output is high during initial setting operation.
BUSY output is low after initial setting.
When M/I register = 01 → Movement toward macro position
Startup when EN is high, initial setting sequence starts
EN
OUT1
OUT2
BUSY
1 period
Operation toward macro
STP period × INIT times
Standby state Operation toward infinity
STP period × 4 STP period × RET setting times
Initial setting operation time
High during initial setting in wait state too
BUSY output is high during initial setting operation.
BUSY output is low after initial setting.
No.A0844-11/12